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Inaccurate writes to 0xFF00-0xFF7F and 0xE000 0xFDFF #6

@AlexSutila

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@AlexSutila

Hello!

First, to address 0xFF00-0xFF7F, it's tricky because some of these MMIO registers have bits that always read off as 1 due to not actually being used on the actual hardware. I noticed I was failing tests because I was emulating such bits accurately.

  • NOTE: I don't have specific tests to mention right off the top of my head but I can easily find examples if wanted

Second, the 0xE000-0xFDFF range specifically mirrors 0xC000-0xDDFF, and I noticed I failed one of the tests when writing the initial state. I had an assertion fail because two different addresses that mirror each other read the same value off my address bus, where as the test was expecting them to be different. This is obviously not possible on the original hardware.

  • NOTE: I also don't have specific examples here either but can easily find some

All things considered, I've still found a lot of value in these tests and appreciate their existence as there are still plenty of other test cases within this test suite that are quite helpful if you don't consider these memory regions. I feel, based on everything I have described above, like these tests were designed around an assumption that the "test environment" assumes a contiguous block of just plain ram. No unused bits in MMIO registers and no address mirroring. Perhaps this could be made more clear in the readme if these kind of assumptions are required to pass certian tests? (unless I am wrong about this assumption of course)

Thanks!

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