From 3a01fd81e31eb4ea6e75637e1dd6c9e540b7d1fb Mon Sep 17 00:00:00 2001 From: Kytezign Date: Sat, 11 Apr 2026 06:34:38 -0700 Subject: [PATCH] Bug fix in RP2xxx fifo level readback tx+rx is 8 bits per snum (4 bits each). --- port/raspberrypi/rp2xxx/src/hal/pio/common.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig index 8a2a58d9a..51c25b5fd 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig @@ -426,7 +426,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { const regs = self.get_regs(); const levels = regs.FLEVEL.raw; - return @as(u4, @truncate(levels >> (@as(u5, 4) * snum) + offset)); + return @as(u4, @truncate(levels >> (@as(u5, 8) * snum) + offset)); } fn interrupt_bit_pos(