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neuron_cdev.c
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4043 lines (3477 loc) · 119 KB
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Amazon.com, Inc. or its affiliates. All Rights Reserved
*/
/** Exposes device node interface(/dev/neuron0) for each device.
* see neuron_ioctl.h for all the operations that can be done this node.
*/
#include "share/neuron_driver_shared.h"
#define pr_fmt(fmt) "%s:%s: " fmt, KBUILD_MODNAME, __func__
#include <linux/kernel.h>
#include <linux/limits.h>
#include <linux/poll.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <linux/device.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/dma-buf.h>
#include <linux/signal.h>
#include "neuron_ioctl.h"
#include "neuron_device.h"
#include "neuron_core.h"
#include "neuron_mmap.h"
#include "neuron_crwl.h"
#include "neuron_dma.h"
#include "neuron_mempool.h"
#include "neuron_topsp.h"
#include "neuron_trace.h"
#include "neuron_arch.h"
#include "neuron_reset.h"
#include "neuron_sysfs_metrics.h"
#include "neuron_dmabuf.h"
#include "neuron_dhal.h"
#include "neuron_nq.h"
#include "neuron_pci.h"
#include "neuron_cdev.h"
#include "neuron_fw_io.h"
#include "neuron_log.h"
#include "neuron_metrics.h"
static dev_t neuron_dev;
static int major;
static struct class *neuron_dev_class;
/* one device node per device */
#define NEURON_MAX_DEV_NODES MAX_NEURON_DEVICE_COUNT
#define IS_NEURON_DEVICE_FREE_ACCESS(filep) ((filep->f_flags & O_WRONLY) == 1)
struct ncdev {
int minor;
int open_count; // number of times this node is opened.
struct cdev cdev;
struct mutex ncdev_lock;
struct neuron_device *ndev; // neuron device associated with this device node.
struct device *device;
};
/* char device nodes created for each device. */
static struct ncdev devnodes[NEURON_MAX_DEV_NODES];
static int ncdev_mem_chunk_to_mem_handle(struct neuron_device *nd, struct mem_chunk *mc, u64 *mh)
{
int ret = 0;
if (mc->mc_handle == NMCH_INVALID_HANDLE) {
ret = nmch_handle_alloc(nd, mc, &mc->mc_handle);
}
*mh = (u64)mc->mc_handle;
return ret;
}
static struct mem_chunk *ncdev_mem_handle_to_mem_chunk(struct neuron_device *nd, u64 mh)
{
struct mem_chunk *mc = mc_handle_find(nd, mh);
if (!mc || mc->magic != MEMCHUNK_MAGIC) {
pr_err("invalid memory handle %llx\n", mh);
return NULL;
}
return mc;
}
static unsigned long neuron_copy_from_user(const char *const fname, void * to, const void __user * from, unsigned long n) {
const long ret = copy_from_user(to, from, n);
if (ret) {
pr_err("copy_from_user failed: %s\n", fname);
}
return ret;
}
static int ncdev_ncid_valid(uint32_t nc_id)
{
if (nc_id < ndhal->ndhal_address_map.nc_per_device) {
return 0;
}
return -E2BIG;
}
static int ncdev_dma_engine_set_state(struct neuron_device *nd, void *param)
{
int ret;
struct neuron_ioctl_dma_eng_set_state arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_eng_set_state *)param, sizeof(arg));
if (ret)
return ret;
return ndmar_eng_set_state(nd, arg.eng_id, arg.state);
}
static int ncdev_dma_engine_get_state(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_dma_eng_get_state arg;
struct neuron_dma_eng_state state;
int ret;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_eng_get_state *)param, sizeof(arg));
if (ret)
return ret;
ret = ndmar_eng_get_state(nd, arg.eng_id, &state);
if (ret)
return ret;
return copy_to_user(arg.state, &state, sizeof(state));
}
static int ncdev_dma_queue_init(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_dma_queue_init arg;
struct mem_chunk *rx_mc;
struct mem_chunk *tx_mc;
struct mem_chunk *rxc_mc;
int ret;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_queue_init *)param, sizeof(arg));
if (ret) {
return -EACCES;
}
if (arg.rx_handle)
rx_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.rx_handle);
else
rx_mc = NULL;
if (arg.tx_handle)
tx_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.tx_handle);
else
tx_mc = NULL;
if (arg.rxc_handle)
rxc_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.rxc_handle);
else
rxc_mc = NULL;
ret = ndmar_queue_init(nd, arg.eng_id, arg.qid, arg.tx_desc_count, arg.rx_desc_count, tx_mc,
rx_mc, rxc_mc, arg.axi_port, false);
return ret;
}
static int ncdev_dma_queue_init_batch_entry(struct neuron_device *nd, struct neuron_ioctl_dma_queue_init * arg)
{
struct mem_chunk *rx_mc;
struct mem_chunk *tx_mc;
struct mem_chunk *rxc_mc;
int ret;
if (arg->rx_handle)
rx_mc = ncdev_mem_handle_to_mem_chunk(nd, arg->rx_handle);
else
rx_mc = NULL;
if (arg->tx_handle)
tx_mc = ncdev_mem_handle_to_mem_chunk(nd, arg->tx_handle);
else
tx_mc = NULL;
if (arg->rxc_handle)
rxc_mc = ncdev_mem_handle_to_mem_chunk(nd, arg->rxc_handle);
else
rxc_mc = NULL;
ret = ndmar_queue_init(nd, arg->eng_id, arg->qid, arg->tx_desc_count, arg->rx_desc_count, tx_mc,
rx_mc, rxc_mc, arg->axi_port, false);
return ret;
}
static int ncdev_dma_queue_init_batch(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_dma_queue_init_batch *arg = kmalloc(sizeof(struct neuron_ioctl_dma_queue_init_batch), GFP_KERNEL);
int ret;
if (!arg) {
return -ENOMEM;
}
ret = neuron_copy_from_user(__func__, arg, (struct neuron_ioctl_dma_queue_init_batch *)param, sizeof(struct neuron_ioctl_dma_queue_init_batch));
if (ret) {
ret = -EACCES;
goto done;
}
if (arg->count >= MAX_DMA_QUEUE_INIT_BATCH) {
ret = -E2BIG;
goto done;
}
u32 i = 0;
for (i = 0; i < arg->count; i++) {
ret = ncdev_dma_queue_init_batch_entry(nd, &arg->entries[i]);
if (ret) goto done;
}
done:
if (arg) kfree(arg);
return ret;
}
static int ncdev_dma_copy_descriptors(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_DMA_COPY_DESCRIPTORS != NEURON_IOCTL_DMA_COPY_DESCRIPTORS64);
struct mem_chunk *src_mc;
u64 mem_handle;
void *buffer;
u64 offset;
u64 num_descs;
enum neuron_dma_queue_type queue_type;
u64 copy_offset = 0, copy_size = 0;
u64 remaining;
int ret;
if (cmd == NEURON_IOCTL_DMA_COPY_DESCRIPTORS) {
struct neuron_ioctl_dma_copy_descriptors arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_copy_descriptors *)param, sizeof(arg));
if (ret)
return ret;
mem_handle = arg.mem_handle;
buffer = arg.buffer;
offset = arg.offset;
num_descs = arg.num_descs;
queue_type = arg.queue_type;
} else if (cmd == NEURON_IOCTL_DMA_COPY_DESCRIPTORS64) {
struct neuron_ioctl_dma_copy_descriptors64 arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_copy_descriptors64 *)param, sizeof(arg));
if (ret)
return ret;
mem_handle = arg.mem_handle;
buffer = arg.buffer;
offset = arg.offset;
num_descs = arg.num_descs;
queue_type = arg.queue_type;
} else {
return -EINVAL;
}
struct mem_chunk *mc = ncdev_mem_handle_to_mem_chunk(nd, mem_handle);
if (!mc)
return -EINVAL;
// check access is within the range.
if (!mc_access_is_within_bounds(mc, offset, num_descs * sizeof(union udma_desc))) {
return -EINVAL;
}
remaining = num_descs * sizeof(union udma_desc);
ret = mc_alloc_align(nd, MC_LIFESPAN_LOCAL, MAX_DMA_DESC_SIZE, 0, MEM_LOC_HOST, 0, 0, mc->nc_id, NEURON_MEMALLOC_TYPE_NCDEV_HOST, &src_mc);
if (ret) {
return -ENOMEM;
}
while (remaining) {
copy_size = remaining < MAX_DMA_DESC_SIZE ? remaining : MAX_DMA_DESC_SIZE;
ret = neuron_copy_from_user(__func__, src_mc->va, buffer + copy_offset, copy_size);
if (ret) {
break;
}
ret = ndma_memcpy_dma_copy_descriptors(nd, src_mc->va, 0, mc, offset + copy_offset,
copy_size, queue_type);
if (ret) {
break;
}
remaining -= copy_size;
copy_offset += copy_size;
}
mc_free(&src_mc);
return ret;
}
static int ncdev_dma_copy_start(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_dma_queue_copy_start arg;
int ret;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_queue_copy_start *)param, sizeof(arg));
if (ret)
return ret;
ret = ndmar_queue_copy_start(nd, arg.eng_id, arg.qid, arg.tx_desc_count, arg.rx_desc_count);
return ret;
}
static int ncdev_dma_ack_completed(struct neuron_device *nd, void *param)
{
int ret;
struct neuron_ioctl_dma_ack_completed arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_ack_completed *)param, sizeof(arg));
if (ret)
return ret;
return ndmar_ack_completed(nd, arg.eng_id, arg.qid, arg.count);
}
static int ncdev_dma_queue_get_state(struct neuron_device *nd, void *param)
{
int ret;
struct neuron_ioctl_dma_queue_get_state arg;
struct neuron_dma_queue_state tx, rx;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_queue_get_state *)param, sizeof(arg));
if (ret)
return ret;
ret = ndmar_queue_get_state(nd, arg.eng_id, arg.qid, &tx, &rx);
if (ret)
return ret;
ret = copy_to_user(arg.tx, &tx, sizeof(tx));
if (ret)
return ret;
return copy_to_user(arg.rx, &rx, sizeof(rx));
}
static int ncdev_dma_queue_release(struct neuron_device *nd, void *param)
{
int ret;
struct neuron_ioctl_dma_queue_release arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_queue_release *)param, sizeof(arg));
if (ret)
return ret;
return ndmar_queue_release(nd, arg.eng_id, arg.qid);
}
static int ncdev_dma_descriptor_copyout(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_dma_descriptor_copyout arg;
struct mem_chunk *tx = NULL, *rx = NULL, *mc = NULL;
u32 tx_size = 0, rx_size = 0;
void *addr = NULL;
u32 desc_size = sizeof(union udma_desc), total_size, offset;
u64 tx_pa, rx_pa, pa;
int ret;
struct ndma_eng *eng;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_dma_descriptor_copyout *)param,
sizeof(arg));
if (ret)
return ret;
if (arg.count == 0)
return -EINVAL;
total_size = arg.count * desc_size;
offset = arg.start_index * desc_size;
// get physical addresses from dma hw regs along w/ MC for vetting
//
ret = ndmar_queue_get_descriptor_info(nd, arg.eng_id, arg.qid, &tx, &rx, &tx_pa, &rx_pa, &tx_size, &rx_size);
if (ret) {
pr_err("get DMA queue desc failed %d\n", ret);
return -EINVAL;
}
eng = ndmar_acquire_engine(nd, arg.eng_id);
if (arg.type == NEURON_DMA_QUEUE_TYPE_TX) {
if (arg.count + arg.start_index > tx_size) {
pr_err("tx size is less than count %d tx %d\n", arg.count, tx_size);
ret = -EFBIG;
goto done;
}
mc = tx;
pa = tx_pa;
} else if (arg.type == NEURON_DMA_QUEUE_TYPE_RX) {
if (arg.count + arg.start_index > rx_size) {
pr_err("rx size is less than count %d rx %d\n", arg.count, rx_size);
ret = -EFBIG;
goto done;
}
mc = rx;
pa = rx_pa;
}
// Note - if address is in SB, BAD mc isn't fatal - we would just need to change vetting to
// use pa to determine ring location and in turn to set nc_id
if (mc == NULL) {
ret = -EINVAL;
goto done;
}
if (mc->magic != MEMCHUNK_MAGIC) {
pr_err("invalid mem_chunk %p\n", mc);
ret = -EINVAL;
goto done;
}
if (mc->mem_location == MEM_LOC_DEVICE) {
addr = kmalloc(total_size, GFP_KERNEL);
if (addr == NULL) {
ret = -ENOMEM;
goto done;
}
ret = ndma_memcpy(nd, mc->nc_id, pa, virt_to_phys(addr) | ndhal->ndhal_address_map.pci_host_base, total_size);
if (ret) {
kfree(addr);
goto done;
}
} else {
addr = mc->va + offset;
}
ret = copy_to_user(arg.buffer, addr, total_size);
if (mc->mem_location == MEM_LOC_DEVICE)
kfree(addr);
done:
ndmar_release_engine(eng);
return ret;
}
static int ncdev_mem_alloc(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_alloc mem_alloc_arg;
enum mem_location location;
u64 mh;
struct mem_chunk *mc;
int ret;
ret = neuron_copy_from_user(__func__, &mem_alloc_arg, (struct neuron_ioctl_mem_alloc *)param,
sizeof(mem_alloc_arg));
if (ret)
return -EACCES;
mem_alloc_category_t mem_alloc_type;
if (mem_alloc_arg.host_memory) {
location = MEM_LOC_HOST;
mem_alloc_type = NEURON_MEMALLOC_TYPE_UNKNOWN_HOST;
}
else {
location = MEM_LOC_DEVICE;
mem_alloc_type = NEURON_MEMALLOC_TYPE_UNKNOWN_DEVICE;
}
ret = mc_alloc_align(nd, MC_LIFESPAN_CUR_PROCESS, mem_alloc_arg.size, 0, location, mem_alloc_arg.dram_channel,
mem_alloc_arg.dram_region, mem_alloc_arg.nc_id, mem_alloc_type, &mc);
if (ret)
return ret;
trace_ioctl_mem_alloc(nd, mc);
ret = ncdev_mem_chunk_to_mem_handle(nd, mc, &mh);
if (!ret) {
ret = copy_to_user(mem_alloc_arg.mem_handle, &mh, sizeof(mc));
}
if (ret) {
mc_free(&mc);
return ret;
}
return 0;
}
static int ncdev_mem_alloc_libnrt(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_MEM_ALLOC_V2 != NEURON_IOCTL_MEM_ALLOC_V2MT);
static_assert(NEURON_IOCTL_MEM_ALLOC_V2 != NEURON_IOCTL_MEM_ALLOC_V2MT64);
static_assert(NEURON_IOCTL_MEM_ALLOC_V2MT != NEURON_IOCTL_MEM_ALLOC_V2MT64);
enum mem_location location;
u64 mh;
struct mem_chunk *mc;
u64 *mem_handle;
u32 host_memory;
u64 size;
u64 align;
u32 dram_channel;
u32 dram_region;
u32 nc_id;
mem_alloc_category_t mem_type;
int ret;
if (cmd == NEURON_IOCTL_MEM_ALLOC_V2) {
struct neuron_ioctl_mem_alloc_v2 mem_alloc_arg;
ret = neuron_copy_from_user(__func__, &mem_alloc_arg, (struct neuron_ioctl_mem_alloc_v2 *)param,
sizeof(mem_alloc_arg));
if (ret)
return ret;
size = mem_alloc_arg.size;
align = mem_alloc_arg.align;
host_memory = mem_alloc_arg.host_memory;
dram_channel = mem_alloc_arg.dram_channel;
dram_region = mem_alloc_arg.dram_region;
nc_id = mem_alloc_arg.nc_id;
mem_handle = mem_alloc_arg.mem_handle;
if (host_memory) {
mem_type = NEURON_MEMALLOC_TYPE_UNKNOWN_HOST;
} else {
mem_type = NEURON_MEMALLOC_TYPE_UNKNOWN_DEVICE;
}
} else if (cmd == NEURON_IOCTL_MEM_ALLOC_V2MT) {
struct neuron_ioctl_mem_alloc_v2_mem_type mem_alloc_arg;
ret = neuron_copy_from_user(__func__, &mem_alloc_arg, (struct neuron_ioctl_mem_alloc_v2_mem_type *)param,
sizeof(mem_alloc_arg));
if (ret)
return ret;
size = mem_alloc_arg.size;
align = mem_alloc_arg.align;
host_memory = mem_alloc_arg.host_memory;
dram_channel = mem_alloc_arg.dram_channel;
dram_region = mem_alloc_arg.dram_region;
nc_id = mem_alloc_arg.nc_id;
mem_type = mem_alloc_arg.mem_type;
mem_handle = mem_alloc_arg.mem_handle;
} else if (cmd == NEURON_IOCTL_MEM_ALLOC_V2MT64) {
struct neuron_ioctl_mem_alloc_v2_mem_type64 mem_alloc_arg;
ret = neuron_copy_from_user(__func__, &mem_alloc_arg, (struct neuron_ioctl_mem_alloc_v2_mem_type64 *)param,
sizeof(mem_alloc_arg));
if (ret)
return ret;
size = mem_alloc_arg.size;
align = mem_alloc_arg.align;
host_memory = mem_alloc_arg.host_memory;
dram_channel = mem_alloc_arg.dram_channel;
dram_region = mem_alloc_arg.dram_region;
nc_id = mem_alloc_arg.nc_id;
mem_type = mem_alloc_arg.mem_type;
mem_handle = mem_alloc_arg.mem_handle;
} else {
return -EINVAL;
}
if (host_memory)
location = MEM_LOC_HOST;
else
location = MEM_LOC_DEVICE;
ret = mc_alloc_align(nd, MC_LIFESPAN_CUR_PROCESS, size, align, location, dram_channel, dram_region, nc_id, mem_type, &mc);
if (ret)
return ret;
trace_ioctl_mem_alloc(nd, mc);
ret = ncdev_mem_chunk_to_mem_handle(nd, mc, &mh);
if (!ret) {
ret = copy_to_user(mem_handle, &mh, sizeof(mc));
}
if (ret) {
mc_free(&mc);
return ret;
}
return 0;
}
static int ncdev_mem_get_pa_deprecated(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_get_pa mem_get_pa_arg;
struct mem_chunk *mc;
int ret;
ret = neuron_copy_from_user(__func__, &mem_get_pa_arg, (struct neuron_ioctl_mem_get_pa *)param,
sizeof(mem_get_pa_arg));
if (ret)
return ret;
mc = ncdev_mem_handle_to_mem_chunk(nd, mem_get_pa_arg.mem_handle);
if (!mc)
return -EINVAL;
return copy_to_user(mem_get_pa_arg.pa, &mc->pa, sizeof(u64));
}
static int ncdev_mem_get_info_deprecated(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_get_info arg;
struct mem_chunk *mc;
u64 mmap_offset;
int ret;
ret = neuron_copy_from_user(__func__, &arg, param, sizeof(arg));
if (ret)
return ret;
mc = ncdev_mem_handle_to_mem_chunk(nd, arg.mem_handle);
if (!mc)
return -EINVAL;
ret = copy_to_user(arg.pa, &mc->pa, sizeof(u64));
if (ret)
return ret;
if (arg.mmap_offset) {
mmap_offset = nmmap_offset(mc);
ret = copy_to_user(arg.mmap_offset, &mmap_offset, sizeof(mmap_offset));
}
return ret;
}
static int ncdev_mem_get_extended_info(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_get_extended_info arg, local;
struct mem_chunk *mc;
int ret;
ret = neuron_copy_from_user(__func__, &arg, param, sizeof(arg));
if (ret)
return ret;
mc = ncdev_mem_handle_to_mem_chunk(nd, arg.mem_handle);
if (!mc)
return EINVAL;
if (mc->mem_location == MEM_LOC_HOST) {
local.pa = mc->pa | ndhal->ndhal_address_map.pci_host_base;
local.host_memory = true;
} else {
local.pa = mc->pa;
local.host_memory = false;
}
local.size = mc->size;
local.mmap_offset = nmmap_offset(mc);
local.mem_handle = (u64)mc;
local.pid = mc->pid;
return copy_to_user(param, &local, sizeof(local));
}
/**
* ncdev_mem_get_mc_mmap_info()
*
* for a given address return the mc info required to mmap the address
*/
static int ncdev_mem_get_mc_mmap_info(struct neuron_device *nd, unsigned int cmd, void*param)
{
struct neuron_ioctl_mem_get_mc_mmap_info arg;
struct neuron_ioctl_mem_get_mc_mmap_info_v2 arg_v2;
static_assert(sizeof(arg) != sizeof(arg_v2));
struct mem_chunk *mc;
int ret;
// compatibility check
if (_IOC_SIZE(cmd) == sizeof(arg)) {
ret = neuron_copy_from_user(__func__, &arg, param, sizeof(arg));
if (ret)
return ret;
mc = nmmap_get_mc_from_pa(nd, arg.pa);
if (mc == NULL) {
return -ENOMEM;
}
arg.mmap_offset = mc->pa;
arg.size = mc->size;
return copy_to_user(param, &arg, sizeof(arg));
} else if (_IOC_SIZE(cmd) == sizeof(arg_v2)) {
ret = neuron_copy_from_user(__func__, &arg_v2, param, sizeof(arg_v2));
if (ret)
return ret;
mc = nmmap_get_mc_from_pa(nd, arg_v2.pa);
if (mc == NULL) {
return -ENOMEM;
}
arg_v2.mmap_offset = mc->pa;
arg_v2.size = mc->size;
ret = ncdev_mem_chunk_to_mem_handle(nd, mc, &arg_v2.mem_handle);
if (ret)
return ret;
return copy_to_user(param, &arg_v2, sizeof(arg_v2));
} else {
return -EINVAL;
}
}
static int ncdev_get_dmabuf_fd(void *param)
{
int ret;
struct neuron_ioctl_dmabuf_fd arg;
int dmabuf_fd;
ret = neuron_copy_from_user(__func__, &arg, param, sizeof(arg));
if (ret)
return ret;
ret = ndmabuf_get_fd(arg.va, arg.size, &dmabuf_fd);
if (ret)
return ret;
return copy_to_user(arg.fd, &dmabuf_fd, sizeof(dmabuf_fd));
}
static int ncdev_mem_free(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_free mem_free_arg;
struct mem_chunk *mc;
int ret;
ret = neuron_copy_from_user(__func__, &mem_free_arg, (struct neuron_ioctl_mem_free *)param,
sizeof(mem_free_arg));
if (ret)
return ret;
mc = ncdev_mem_handle_to_mem_chunk(nd, mem_free_arg.mem_handle);
if (!mc)
return -EINVAL;
trace_ioctl_mem_alloc(nd, mc);
mc_free(&mc);
return 0;
}
static int ncdev_memset(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_MEMSET != NEURON_IOCTL_MEMSET64);
struct mem_chunk *mc;
u64 mem_handle;
u64 offset;
u64 size;
u32 value;
int ret = 0;
//
if (cmd == NEURON_IOCTL_MEMSET) {
struct neuron_ioctl_memset arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_memset *)param, sizeof(arg));
if (ret)
return ret;
mem_handle = arg.mem_handle;
offset = arg.offset;
size = arg.size;
value = arg.value;
} else if (cmd == NEURON_IOCTL_MEMSET64) {
struct neuron_ioctl_memset64 arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_memset64 *)param, sizeof(arg));
if (ret)
return ret;
mem_handle = arg.mem_handle;
offset = arg.offset;
size = arg.size;
value = arg.value;
} else {
return -EINVAL;
}
mc = ncdev_mem_handle_to_mem_chunk(nd, mem_handle);
if (!mc) {
return -EINVAL;
}
// check access is within the range.
if (!mc_access_is_within_bounds(mc, offset, size)) {
pr_err("offset+size is too large for mem handle\n");
return -EINVAL;
}
ret = ndma_memset(nd, mc, offset, value, size);
if (ret) {
pr_err("memset failed\n");
}
return ret;
}
static int ncdev_mem_copy(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_MEM_COPY != NEURON_IOCTL_MEM_COPY64);
struct mem_chunk *src_mc;
struct mem_chunk *dst_mc;
u64 src_mem_handle;
u64 dst_mem_handle;
u64 src_offset;
u64 dst_offset;
u64 size;
int ret;
if (cmd == NEURON_IOCTL_MEM_COPY) {
struct neuron_ioctl_mem_copy arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_mem_copy *)param, sizeof(arg));
if (ret)
return ret;
src_mem_handle = arg.src_mem_handle;
dst_mem_handle = arg.dst_mem_handle;
src_offset = arg.src_offset;
dst_offset = arg.dst_offset;
size = arg.size;
dst_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.dst_mem_handle);
} else if (cmd == NEURON_IOCTL_MEM_COPY64) {
struct neuron_ioctl_mem_copy64 arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_mem_copy64 *)param, sizeof(arg));
if (ret)
return ret;
src_mem_handle = arg.src_mem_handle;
dst_mem_handle = arg.dst_mem_handle;
src_offset = arg.src_offset;
dst_offset = arg.dst_offset;
size = arg.size;
} else {
return -EINVAL;
}
src_mc = ncdev_mem_handle_to_mem_chunk(nd, src_mem_handle);
dst_mc = ncdev_mem_handle_to_mem_chunk(nd, dst_mem_handle);
if (!src_mc || !dst_mc)
return -EINVAL;
// check access is within the range.
if (!mc_access_is_within_bounds(src_mc, src_offset, size)) {
pr_err("src offset+size is too large for mem handle\n");
return -EINVAL;
}
// check access is within the range.
if (!mc_access_is_within_bounds(dst_mc, dst_offset, size)) {
pr_err("dst offset+size is too large for mem handle\n");
return -EINVAL;
}
ret = ndma_memcpy_mc(nd, src_mc, dst_mc, src_offset, dst_offset, size);
if (ret) {
pr_err("dma memcpy failed\n");
return ret;
}
trace_ioctl_mem_copy(nd, src_mc, dst_mc);
return 0;
}
static int ncdev_mem_copy_async(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_MEM_COPY_ASYNC != NEURON_IOCTL_MEM_COPY_ASYNC64);
struct mem_chunk *src_mc;
struct mem_chunk *dst_mc;
u64 src_mem_handle;
u64 dst_mem_handle;
u64 src_offset;
u64 dst_offset;
u64 size;
u64 host_prefetch_addr;
u32 pwait_handle;
u32 *wait_handle;
union {
struct neuron_ioctl_mem_copy_async a;
struct neuron_ioctl_mem_copy_async64 a64;
} arg;
u32 arg_size;
int ret;
if (cmd == NEURON_IOCTL_MEM_COPY_ASYNC) {
arg_size = sizeof(arg.a);
ret = neuron_copy_from_user(__func__, &arg, (void *)param, arg_size);
if (ret)
return ret;
src_mem_handle = arg.a.src_mem_handle;
dst_mem_handle = arg.a.dst_mem_handle;
src_offset = arg.a.src_offset;
dst_offset = arg.a.dst_offset;
size = arg.a.size;
host_prefetch_addr = arg.a.host_prefetch_addr;
pwait_handle = arg.a.pwait_handle;
wait_handle = &arg.a.wait_handle;
} else if (cmd == NEURON_IOCTL_MEM_COPY_ASYNC64) {
arg_size = sizeof(arg.a64);
ret = neuron_copy_from_user(__func__, &arg, (void *)param, arg_size);
if (ret)
return ret;
src_mem_handle = arg.a64.src_mem_handle;
dst_mem_handle = arg.a64.dst_mem_handle;
src_offset = arg.a64.src_offset;
dst_offset = arg.a64.dst_offset;
size = arg.a64.size;
host_prefetch_addr = arg.a64.host_prefetch_addr;
pwait_handle = arg.a64.pwait_handle;
wait_handle = &arg.a64.wait_handle;
} else {
return -EINVAL;
}
src_mc = ncdev_mem_handle_to_mem_chunk(nd, src_mem_handle);
dst_mc = ncdev_mem_handle_to_mem_chunk(nd, dst_mem_handle);
if (!src_mc || !dst_mc)
return -EINVAL;
// check access is within the range.
if (!mc_access_is_within_bounds(src_mc, src_offset, size)) {
pr_err("src offset+size is too large for mem handle\n");
return -EINVAL;
}
// check access is within the range.
if (!mc_access_is_within_bounds(dst_mc, dst_offset, size)) {
pr_err("dst offset+size is too large for mem handle\n");
return -EINVAL;
}
ret = ndma_memcpy_mc_async(nd, src_mc, dst_mc, src_offset, dst_offset, size, host_prefetch_addr, pwait_handle, wait_handle);
if (ret) {
pr_err("dma memcpy failed: %d\n", ret);
return ret;
}
// return the new wait handle
ret = copy_to_user((void *)param, &arg, arg_size);
trace_ioctl_mem_copy(nd, src_mc, dst_mc);
return ret;
}
static int ncdev_mem_copy_async_wait(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_mem_copy_async_wait arg;
struct mem_chunk *src_mc;
struct mem_chunk *dst_mc;
int ret;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_mem_copy_async_wait *)param, sizeof(arg));
if (ret)
return ret;
src_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.src_mem_handle);
dst_mc = ncdev_mem_handle_to_mem_chunk(nd, arg.dst_mem_handle);
if (!src_mc || !dst_mc) {
pr_err("dma memcpy wait failed. invalid mem chunk handle\n");
return -EINVAL;
}
if ((arg.pwait_handle < NEURON_DMA_H2T_CTX_HANDLE_ASYNC1) || (arg.pwait_handle > NEURON_DMA_H2T_CTX_HANDLE_ASYNC2)) {
pr_err("dma memcpy wait failed. invalid wait handle: %d\n", arg.pwait_handle);
return -EINVAL;
}
ret = ndma_memcpy_mc_wait( nd, src_mc, dst_mc, arg.pwait_handle);
if (ret) {
pr_err("dma memcpy wait failed: %d\n", ret);
return ret;
}
return ret;
}
static int ncdev_verify_mem_region(u64 addr, u64 size)
{
int i = 0;
while (ndhal->ndhal_cdev.ncdev_mem_regions[i].start != NCDEV_MEM_REGION_INVALID) {
if ((addr >= ndhal->ndhal_cdev.ncdev_mem_regions[i].start)
&& (addr + size <= (ndhal->ndhal_cdev.ncdev_mem_regions[i].start + ndhal->ndhal_cdev.ncdev_mem_regions[i].size))) {
return 0;
}
i++;
}
pr_err("Address out of range addr:0x%llx", (u64)addr);
return -ENOMEM;
}
static int ncdev_program_engine(struct neuron_device *nd, void *param)
{
struct neuron_ioctl_program_engine arg;
int ret;
struct mem_chunk *src_mc;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_program_engine *)param, sizeof(arg));
if (ret)
return ret;
if (ncdev_verify_mem_region(arg.dst + arg.offset, arg.size))
return -ENOMEM;
ret = mc_alloc_align(nd, MC_LIFESPAN_LOCAL, arg.size, 0, MEM_LOC_HOST, 0, 0, 0, NEURON_MEMALLOC_TYPE_NCDEV_HOST, &src_mc);
if (ret) {
ret = -ENOMEM;
return ret;
}
ret = neuron_copy_from_user(__func__, src_mc->va, arg.buffer + arg.offset, arg.size);
if (ret)
goto error;
ret = ndma_memcpy(nd, 0, virt_to_phys(src_mc->va) | ndhal->ndhal_address_map.pci_host_base,
arg.dst + arg.offset, arg.size);
if (ret) {
pr_err("engine programming dma failed. addr: %llu\n", arg.dst + arg.offset);
}
error:
mc_free(&src_mc);
return ret;
}
static int ncdev_program_engine_nc(struct neuron_device *nd, unsigned int cmd, void *param)
{
static_assert(NEURON_IOCTL_PROGRAM_ENGINE_NC != NEURON_IOCTL_PROGRAM_ENGINE_NC64);
struct mem_chunk *src_mc;
u32 nc_id;
u64 dst;
void * buffer;
u64 offset;
u64 size;
int ret;
if (cmd == NEURON_IOCTL_PROGRAM_ENGINE_NC) {
struct neuron_ioctl_program_engine_nc arg;
ret = neuron_copy_from_user(__func__, &arg, (struct neuron_ioctl_program_engine_nc *)param, sizeof(arg));
if (ret)
return ret;