diff --git a/src/lib.rs b/src/lib.rs
index 1c9fa178..c3af0569 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -257,7 +257,7 @@ impl PRegSet {
     }
 
     /// Add a physical register (PReg) to the set.
-    pub fn add(&mut self, reg: PReg) {
+    pub const fn add(&mut self, reg: PReg) {
         let (index, bit) = Self::split_index(reg);
         self.bits[index] |= 1 << bit;
     }
@@ -462,6 +462,11 @@ impl VReg {
     pub const fn bits(self) -> usize {
         self.bits as usize
     }
+
+    #[inline(always)]
+    pub const fn from_bits(bits: u32) -> VReg {
+        Self { bits }
+    }
 }
 
 impl From<u32> for VReg {