From 9d86473f93dcb4d6c25abfabbb628c9574be4efe Mon Sep 17 00:00:00 2001 From: grasswang <81715394+grasswang@users.noreply.github.com> Date: Wed, 31 Mar 2021 16:14:00 -0500 Subject: [PATCH 1/5] Add the interrupt support to IP-408 Add the interrupt support to IP-408 --- ipUnidigApp/src/drvIpUnidig.cpp | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/ipUnidigApp/src/drvIpUnidig.cpp b/ipUnidigApp/src/drvIpUnidig.cpp index 880fd18..57ea4c2 100755 --- a/ipUnidigApp/src/drvIpUnidig.cpp +++ b/ipUnidigApp/src/drvIpUnidig.cpp @@ -322,6 +322,19 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in regs_.inputRegisterHigh = base + 0x1; regs_.outputRegisterLow = base + 0x2; regs_.outputRegisterHigh = base + 0x3; + regs_.intEnableRegisterLow = base + 0x4; + regs_.intEnableRegisterHigh = NULL; + /*The controlRegister controls the interrupt type, + D0-D7 each bit is Ch0-Ch7. All bit set to 0 after reset. + 1 means COS, 0 means H/L depends on the Poloarty */ + regs_.controlRegister0 = base + 0x5; + *regs_.controlRegister0 = 0; + regs_.intPolarityRegisterLow = base + 0x6; + regs_.intPolarityRegisterHigh = NULL; + regs_.intPendingRegisterLow = base + 0x7; + regs_.intPendingRegisterHigh = NULL; + regs_.intClearRegisterLow = base + 0x7; + regs_.intClearRegisterHigh = NULL; regs_.intVecRegister = base + 0x8; break; } @@ -356,6 +369,7 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in case UNIDIG_I_HV_16I8O: case UNIDIG_I_O_12I12O: case UNIDIG_I_HV_8I16O: + case ACROMAG_IP408_32: supportsInterrupts_ = 1; break; default: @@ -636,16 +650,16 @@ void IpUnidig::pollerThread() * have registered with registerDevCallback */ //static const char *functionName = "pollerThread"; epicsUInt32 newBits, changedBits, interruptMask=0; - ipUnidigMessage msg; + ipUnidigMessage msg; int status; static const char *functionName = "pollerThread"; - while(1) { + while(1) { /* Wait for an interrupt or for the poll time, whichever comes first */ status = epicsMessageQueueReceiveWithTimeout(msgQId_, &msg, sizeof(msg), - pollTime_); - lock(); + pollTime_); + lock(); if (status == -1) { /* The wait timed out, so there was no interrupt, so we need * to read the bits. If there was an interrupt the bits got @@ -674,7 +688,7 @@ void IpUnidig::pollerThread() forceCallback_ = 0; asynPortDriver::setUIntDigitalParam(digitalInputParam_, newBits, 0xFFFFFFFF, interruptMask); callParamCallbacks(); - } + } unlock(); } } From 6e4bff05a722685cfe92766f9e83672dacf190b6 Mon Sep 17 00:00:00 2001 From: Grass Wang <81715394+grasswang@users.noreply.github.com> Date: Wed, 31 Mar 2021 16:59:40 -0500 Subject: [PATCH 2/5] added all 8 channels for interrupt vector added all 8 channels for interrupt vector --- ipUnidigApp/src/drvIpUnidig.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/ipUnidigApp/src/drvIpUnidig.cpp b/ipUnidigApp/src/drvIpUnidig.cpp index 57ea4c2..42df503 100755 --- a/ipUnidigApp/src/drvIpUnidig.cpp +++ b/ipUnidigApp/src/drvIpUnidig.cpp @@ -407,9 +407,11 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in *regs_.intVecRegister = intVec; driverTable[numCards] = this; numCards++; - if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } + for (int iCh=0; iCh<8; iCh++) { + if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + } *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); writeIntEnableRegs(); From 7e1d39a91b9c4b50e260f058468dbe07925de61f Mon Sep 17 00:00:00 2001 From: Grass Wang <81715394+grasswang@users.noreply.github.com> Date: Wed, 31 Mar 2021 17:11:12 -0500 Subject: [PATCH 3/5] Update the IntVector settiing for IP-408 --- ipUnidigApp/src/drvIpUnidig.cpp | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/ipUnidigApp/src/drvIpUnidig.cpp b/ipUnidigApp/src/drvIpUnidig.cpp index 42df503..111422a 100755 --- a/ipUnidigApp/src/drvIpUnidig.cpp +++ b/ipUnidigApp/src/drvIpUnidig.cpp @@ -407,11 +407,21 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in *regs_.intVecRegister = intVec; driverTable[numCards] = this; numCards++; - for (int iCh=0; iCh<8; iCh++) { - if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } - } + switch (model_) { + case ACROMAG_IP408_32: + for (int iCh=0; iCh<8; iCh++) { + if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + } + break; + default: + if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + break; + } + *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); writeIntEnableRegs(); From e99859300bb0c69bb2100538ecca3362303084d9 Mon Sep 17 00:00:00 2001 From: grass Date: Fri, 2 Apr 2021 11:19:18 -0500 Subject: [PATCH 4/5] remove higher-channels register for IP408 and add first 8 channel mask for lower-channels --- ipUnidigApp/src/drvIpUnidig.cpp | 158 ++++++++++++++++++++------------ 1 file changed, 99 insertions(+), 59 deletions(-) diff --git a/ipUnidigApp/src/drvIpUnidig.cpp b/ipUnidigApp/src/drvIpUnidig.cpp index 111422a..1d0c5b0 100755 --- a/ipUnidigApp/src/drvIpUnidig.cpp +++ b/ipUnidigApp/src/drvIpUnidig.cpp @@ -74,6 +74,8 @@ #define MAX_MESSAGES 1000 +#define IP408_8CH_MASK 0xff /*ACROMAG IP408 only have interrupt for first 8 channels*/ + typedef struct { volatile epicsUInt16 *outputRegisterLow; volatile epicsUInt16 *outputRegisterHigh; @@ -322,21 +324,25 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in regs_.inputRegisterHigh = base + 0x1; regs_.outputRegisterLow = base + 0x2; regs_.outputRegisterHigh = base + 0x3; - regs_.intEnableRegisterLow = base + 0x4; - regs_.intEnableRegisterHigh = NULL; - /*The controlRegister controls the interrupt type, - D0-D7 each bit is Ch0-Ch7. All bit set to 0 after reset. - 1 means COS, 0 means H/L depends on the Poloarty */ - regs_.controlRegister0 = base + 0x5; - *regs_.controlRegister0 = 0; - regs_.intPolarityRegisterLow = base + 0x6; - regs_.intPolarityRegisterHigh = NULL; - regs_.intPendingRegisterLow = base + 0x7; - regs_.intPendingRegisterHigh = NULL; - regs_.intClearRegisterLow = base + 0x7; - regs_.intClearRegisterHigh = NULL; + regs_.intEnableRegisterLow = base + 0x4; + regs_.intEnableRegisterHigh = NULL; + regs_.controlRegister0 = base + 0x5; + regs_.intPolarityRegisterLow = base + 0x6; + regs_.intPolarityRegisterHigh = NULL; + regs_.intPendingRegisterLow = base + 0x7; + regs_.intPendingRegisterHigh = NULL; + regs_.intClearRegisterLow = base + 0x7; + regs_.intClearRegisterHigh = NULL; regs_.intVecRegister = base + 0x8; - break; + /*The controlRegister controls the interrupt type, + D0-D7 each bit is Ch0-Ch7. All bit set to 0 after reset. + 1 means COS, 0 means H/L depends on the Poloarty + If user choose both rising edge and falling edge, the COS is configured. + If rising edge are choosen, the polarity Mask is 1 for that channel. + The polarity mask will have no effect if COS is configured for that channel.*/ + *regs_.controlRegister0 = risingMask_ & fallingMask_ & IP408_8CH_MASK; + polarityMask_ =risingMask_&IP408_8CH_MASK; + break; } break; case SBS_ID: @@ -369,7 +375,7 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in case UNIDIG_I_HV_16I8O: case UNIDIG_I_O_12I12O: case UNIDIG_I_HV_8I16O: - case ACROMAG_IP408_32: + case ACROMAG_IP408_32: supportsInterrupts_ = 1; break; default: @@ -407,23 +413,25 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in *regs_.intVecRegister = intVec; driverTable[numCards] = this; numCards++; - switch (model_) { - case ACROMAG_IP408_32: - for (int iCh=0; iCh<8; iCh++) { - if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } - } - break; - default: - if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } - break; - } - - *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; - *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); + + switch (model_) { + case ACROMAG_IP408_32: + for (int iCh=0; iCh<8; iCh++) { + if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + } + *regs_.intPolarityRegisterLow = (epicsUInt16)(polarityMask_& IP408_8CH_MASK); + break; + default: + if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; + *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); + break; + } + writeIntEnableRegs(); /* Enable IPAC module interrupts and set module status. */ @@ -628,9 +636,17 @@ void IpUnidig::intFunc() /* Clear the interrupts by copying from the interrupt pending register to * the interrupt clear register */ - *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow; - *r.intClearRegisterHigh = pendingHigh = *r.intPendingRegisterHigh; - pendingMask = pendingLow | (pendingHigh << 16); + switch (model_) { + case ACROMAG_IP408_32: + *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow & IP408_8CH_MASK; + pendingMask = pendingLow; + break; + default: + *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow; + *r.intClearRegisterHigh = pendingHigh = *r.intPendingRegisterHigh; + pendingMask = pendingLow | (pendingHigh << 16); + break; + } /* Read the current input. Don't use read() because that can print debugging. */ if (r.inputRegisterLow) inputs = (epicsUInt32) *r.inputRegisterLow; if (r.inputRegisterHigh) inputs |= (epicsUInt32) (*r.inputRegisterHigh << 16); @@ -641,16 +657,24 @@ void IpUnidig::intFunc() else messagesFailed_++; - /* Are there any bits which should generate interrupts on both the rising - * and falling edge, and which just generated this interrupt? */ - invertMask = pendingMask & risingMask_ & fallingMask_; - if (invertMask != 0) { - /* We want to invert all bits in the polarityMask that are set in - * invertMask. This is done with xor. */ - polarityMask_ = polarityMask_ ^ invertMask; - *r.intPolarityRegisterLow = (epicsUInt16) polarityMask_; - *r.intPolarityRegisterHigh = (epicsUInt16) (polarityMask_ >> 16); - } + switch (model_) { + case ACROMAG_IP408_32: + /*if the rising edge and falling edge can both generate interrupt, + in the IP408 it should change controlRegister, not the PolarityRegister*/ + break; + default: + /* Are there any bits which should generate interrupts on both the rising + * and falling edge, and which just generated this interrupt? */ + invertMask = pendingMask & risingMask_ & fallingMask_; + if (invertMask != 0) { + /* We want to invert all bits in the polarityMask that are set in + * invertMask. This is done with xor.*/ + polarityMask_ = polarityMask_ ^ invertMask; + *r.intPolarityRegisterLow = (epicsUInt16) polarityMask_; + *r.intPolarityRegisterHigh = (epicsUInt16) (polarityMask_ >> 16); + } + break; + } } @@ -670,8 +694,8 @@ void IpUnidig::pollerThread() /* Wait for an interrupt or for the poll time, whichever comes first */ status = epicsMessageQueueReceiveWithTimeout(msgQId_, &msg, sizeof(msg), - pollTime_); - lock(); + pollTime_); + lock(); if (status == -1) { /* The wait timed out, so there was no interrupt, so we need * to read the bits. If there was an interrupt the bits got @@ -700,7 +724,7 @@ void IpUnidig::pollerThread() forceCallback_ = 0; asynPortDriver::setUIntDigitalParam(digitalInputParam_, newBits, 0xFFFFFFFF, interruptMask); callParamCallbacks(); - } + } unlock(); } } @@ -710,10 +734,20 @@ void IpUnidig::writeIntEnableRegs() { ipUnidigRegisters r = regs_; - *r.intEnableRegisterLow = (epicsUInt16) (risingMask_ | - fallingMask_); - *r.intEnableRegisterHigh = (epicsUInt16) ((risingMask_ | - fallingMask_) >> 16); + switch (model_) { + case ACROMAG_IP408_32: + *r.intEnableRegisterLow = (epicsUInt16) (risingMask_ | + fallingMask_)&(IP408_8CH_MASK); + break; + default: + *r.intEnableRegisterLow = (epicsUInt16) (risingMask_ | + fallingMask_); + *r.intEnableRegisterHigh = (epicsUInt16) ((risingMask_ | + fallingMask_) >> 16); + break; + } + + } void IpUnidig::rebootCallback() @@ -721,7 +755,9 @@ void IpUnidig::rebootCallback() ipUnidigRegisters r = regs_; *r.intEnableRegisterLow = 0; - *r.intEnableRegisterHigh = 0; + if(model_!=ACROMAG_IP408_32){ + *r.intEnableRegisterHigh = 0; + } rebooting_ = 1; } @@ -733,17 +769,21 @@ void IpUnidig::report(FILE *fp, int details) fprintf(fp, "drvIpUnidig %s: connected at base address %p\n", this->portName, baseAddress_); if (details >= 1) { - if (r.intEnableRegisterLow) intEnableRegister = *r.intEnableRegisterLow; - if (r.intEnableRegisterHigh) intEnableRegister |= (*r.intEnableRegisterHigh << 16); - if (r.intPolarityRegisterLow) intPolarityRegister = *r.intPolarityRegisterLow; - if (r.intPolarityRegisterHigh) intPolarityRegister |= (*r.intPolarityRegisterHigh << 16); - + if(model_==ACROMAG_IP408_32){ + if (r.intEnableRegisterLow) intEnableRegister = *r.intEnableRegisterLow&IP408_8CH_MASK; + if (r.intPolarityRegisterLow) intPolarityRegister = *r.intPolarityRegisterLow&IP408_8CH_MASK; + }else{ + if (r.intEnableRegisterLow) intEnableRegister = *r.intEnableRegisterLow; + if (r.intEnableRegisterHigh) intEnableRegister |= (*r.intEnableRegisterHigh << 16); + if (r.intPolarityRegisterLow) intPolarityRegister = *r.intPolarityRegisterLow; + if (r.intPolarityRegisterHigh) intPolarityRegister |= (*r.intPolarityRegisterHigh << 16); + } fprintf(fp, " risingMask=%x\n", risingMask_); fprintf(fp, " fallingMask=%x\n", fallingMask_); fprintf(fp, " intEnableRegister=%x\n", intEnableRegister); fprintf(fp, " intPolarityRegister=%x\n", intPolarityRegister); fprintf(fp, " messages sent OK=%d; send failed (queue full)=%d\n", - messagesSent_, messagesFailed_); + messagesSent_, messagesFailed_); } asynPortDriver::report(fp, details); } From f9838f87b4dd8158267f7f282fea99767f7ec085 Mon Sep 17 00:00:00 2001 From: grass Date: Fri, 2 Apr 2021 11:37:04 -0500 Subject: [PATCH 5/5] run untabify to replace all tab to space --- ipUnidigApp/src/drvIpUnidig.cpp | 88 ++++++++++++++++----------------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/ipUnidigApp/src/drvIpUnidig.cpp b/ipUnidigApp/src/drvIpUnidig.cpp index 1d0c5b0..580eaba 100755 --- a/ipUnidigApp/src/drvIpUnidig.cpp +++ b/ipUnidigApp/src/drvIpUnidig.cpp @@ -324,7 +324,7 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in regs_.inputRegisterHigh = base + 0x1; regs_.outputRegisterLow = base + 0x2; regs_.outputRegisterHigh = base + 0x3; - regs_.intEnableRegisterLow = base + 0x4; + regs_.intEnableRegisterLow = base + 0x4; regs_.intEnableRegisterHigh = NULL; regs_.controlRegister0 = base + 0x5; regs_.intPolarityRegisterLow = base + 0x6; @@ -334,15 +334,15 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in regs_.intClearRegisterLow = base + 0x7; regs_.intClearRegisterHigh = NULL; regs_.intVecRegister = base + 0x8; - /*The controlRegister controls the interrupt type, - D0-D7 each bit is Ch0-Ch7. All bit set to 0 after reset. - 1 means COS, 0 means H/L depends on the Poloarty - If user choose both rising edge and falling edge, the COS is configured. - If rising edge are choosen, the polarity Mask is 1 for that channel. - The polarity mask will have no effect if COS is configured for that channel.*/ + /*The controlRegister controls the interrupt type, + D0-D7 each bit is Ch0-Ch7. All bit set to 0 after reset. + 1 means COS, 0 means H/L depends on the Poloarty + If user choose both rising edge and falling edge, the COS is configured. + If rising edge are choosen, the polarity Mask is 1 for that channel. + The polarity mask will have no effect if COS is configured for that channel.*/ *regs_.controlRegister0 = risingMask_ & fallingMask_ & IP408_8CH_MASK; - polarityMask_ =risingMask_&IP408_8CH_MASK; - break; + polarityMask_ =risingMask_&IP408_8CH_MASK; + break; } break; case SBS_ID: @@ -416,20 +416,20 @@ IpUnidig::IpUnidig(const char *portName, int carrier, int slot, int msecPoll, in switch (model_) { case ACROMAG_IP408_32: - for (int iCh=0; iCh<8; iCh++) { - if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } + for (int iCh=0; iCh<8; iCh++) { + if (ipmIntConnect(carrier, slot, intVec+iCh, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } } - *regs_.intPolarityRegisterLow = (epicsUInt16)(polarityMask_& IP408_8CH_MASK); + *regs_.intPolarityRegisterLow = (epicsUInt16)(polarityMask_& IP408_8CH_MASK); break; default: - if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { - errlogPrintf("ipUnidig interrupt connect failure\n"); - } - *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; - *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); - break; + if (ipmIntConnect(carrier, slot, intVec, intFuncC, numCards-1)) { + errlogPrintf("ipUnidig interrupt connect failure\n"); + } + *regs_.intPolarityRegisterLow = (epicsUInt16)polarityMask_; + *regs_.intPolarityRegisterHigh = (epicsUInt16)(polarityMask_ >> 16); + break; } writeIntEnableRegs(); @@ -638,14 +638,14 @@ void IpUnidig::intFunc() * the interrupt clear register */ switch (model_) { case ACROMAG_IP408_32: - *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow & IP408_8CH_MASK; - pendingMask = pendingLow; + *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow & IP408_8CH_MASK; + pendingMask = pendingLow; break; default: - *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow; - *r.intClearRegisterHigh = pendingHigh = *r.intPendingRegisterHigh; - pendingMask = pendingLow | (pendingHigh << 16); - break; + *r.intClearRegisterLow = pendingLow = *r.intPendingRegisterLow; + *r.intClearRegisterHigh = pendingHigh = *r.intPendingRegisterHigh; + pendingMask = pendingLow | (pendingHigh << 16); + break; } /* Read the current input. Don't use read() because that can print debugging. */ if (r.inputRegisterLow) inputs = (epicsUInt32) *r.inputRegisterLow; @@ -659,21 +659,21 @@ void IpUnidig::intFunc() switch (model_) { case ACROMAG_IP408_32: - /*if the rising edge and falling edge can both generate interrupt, - in the IP408 it should change controlRegister, not the PolarityRegister*/ - break; + /*if the rising edge and falling edge can both generate interrupt, + in the IP408 it should change controlRegister, not the PolarityRegister*/ + break; default: - /* Are there any bits which should generate interrupts on both the rising - * and falling edge, and which just generated this interrupt? */ - invertMask = pendingMask & risingMask_ & fallingMask_; - if (invertMask != 0) { - /* We want to invert all bits in the polarityMask that are set in - * invertMask. This is done with xor.*/ - polarityMask_ = polarityMask_ ^ invertMask; - *r.intPolarityRegisterLow = (epicsUInt16) polarityMask_; - *r.intPolarityRegisterHigh = (epicsUInt16) (polarityMask_ >> 16); - } - break; + /* Are there any bits which should generate interrupts on both the rising + * and falling edge, and which just generated this interrupt? */ + invertMask = pendingMask & risingMask_ & fallingMask_; + if (invertMask != 0) { + /* We want to invert all bits in the polarityMask that are set in + * invertMask. This is done with xor.*/ + polarityMask_ = polarityMask_ ^ invertMask; + *r.intPolarityRegisterLow = (epicsUInt16) polarityMask_; + *r.intPolarityRegisterHigh = (epicsUInt16) (polarityMask_ >> 16); + } + break; } } @@ -737,13 +737,13 @@ void IpUnidig::writeIntEnableRegs() switch (model_) { case ACROMAG_IP408_32: *r.intEnableRegisterLow = (epicsUInt16) (risingMask_ | - fallingMask_)&(IP408_8CH_MASK); + fallingMask_)&(IP408_8CH_MASK); break; default: *r.intEnableRegisterLow = (epicsUInt16) (risingMask_ | - fallingMask_); + fallingMask_); *r.intEnableRegisterHigh = (epicsUInt16) ((risingMask_ | - fallingMask_) >> 16); + fallingMask_) >> 16); break; } @@ -783,7 +783,7 @@ void IpUnidig::report(FILE *fp, int details) fprintf(fp, " intEnableRegister=%x\n", intEnableRegister); fprintf(fp, " intPolarityRegister=%x\n", intPolarityRegister); fprintf(fp, " messages sent OK=%d; send failed (queue full)=%d\n", - messagesSent_, messagesFailed_); + messagesSent_, messagesFailed_); } asynPortDriver::report(fp, details); }