MOVI, and MOVI.N, encode immediate values with incorrect bit field placement

[Chouette2100]

Summary

The movi, and movi.n, instructions in xtensa-assembler encode immediate values incorrectly. The bit fields are placed in reversed positions.

Environment

• ESP32Forth version: v7.0.7.21/v7.0.7.22
• Board: ESP32-WROOM32
• Platform: Linux Mint 21.3 with Arduino IDE and VSCode + PlatformIO + ESP-IDF

Problem Description

When using movi, and movi.n,, the immediate values are not correctly encoded:

Instruction	Input	Expected	Actual
a8 $001 movi,	$001	$001	$100
a8 $01 movi.n,	$01	$01	$10

Analysis

Looking at assembler.h, the immediate bits appear to be packed sequentially from high to low. However, Xtensa ISA requires split bit field placement.

For MOVI.N instruction encoding:

• Format: imm7[6:4] | s[3:0] | imm7[3:0] | 0xC
• a8 1 MOVI.N, produces 0x081C but should produce 0x180C

The upper bits (imm7[6:4]) and lower bits (imm7[3:0]) are swapped.

Reproduction Code

xtensa-assembler

: macro: : ;

macro: sp++,
  a2 a2 4 ADDI, ;

macro: arPUSH, { ar -- }
  sp++, ar a2 0 S32I.N, ;

code movitest
  a1 $20 ENTRY,
  a8 $001 movi,
  a8 arPUSH,
  a8 $01 movi.n,
  a8 arPUSH,
  RETW.N,
end-code

: run_movitest
  movitest
  swap CR
  hex
  ." result of movi,   " . CR
  ." result of movi.n, " . CR
;

run_movitest

Output

result of movi,   100 
result of movi.n, 10 

Verification

Manually swapping the bit fields produces correct results:

\ For MOVI.N: swap imm7[6:4] and imm7[3:0]
a8 -7 dup $70 and 4 rshift swap $f and 3 lshift or movi.n,
\ This correctly loads -7 into a8

Workaround

Until fixed, users can pre-swap the immediate bits manually:

\ For MOVI.N: swap imm7[6:4] and imm7[3:0]
: fix-movi.n-imm ( n -- n' )
  dup $70 and 4 rshift swap $0F and 3 lshift or ;

\ Usage: a8 -7 fix-movi.n-imm movi.n,

\ For MOVI: swap imm12[11:8] and imm12[7:0]
: fix-movi-imm ( n -- n' )
  ~~dup $F00 and 8 rshift swap $0FF and 8 lshift or ;~~
dup $F00 and 8 rshift swap $0FF and 4 lshift or ;

\ Usage: a8 $123 fix-movi-imm movi,

References

• Xtensa® Instruction Set Architecture (ISA) Summary