use crate::default::{F32x4, I32x4, U32x4};
use crate::scalar::F32x4 as F32x4S;
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
mod test_a_ub_x86_sse41 {
use crate::x86::{F32x2, F32x4, I32x2, I32x4};
#[test]
fn f32x2_floor_requires_sse41() {
// Memory safety issue: this safe API routes through x86::_mm_floor_ps, which requires
// SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so this is UB
// on targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = F32x2::new(1.25, -2.75).floor();
}
#[test]
fn f32x2_ceil_requires_sse41() {
// Memory safety issue: this safe API routes through x86::_mm_ceil_ps, which requires
// SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so this is UB
// on targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = F32x2::new(1.25, -2.75).ceil();
}
#[test]
fn f32x4_floor_requires_sse41() {
// Memory safety issue: this safe API calls x86::_mm_floor_ps, which requires SSE4.1.
// The x86 backend is selected without enabling or checking SSE4.1, so this is UB on
// targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = F32x4::new(1.25, -2.75, 3.5, -4.5).floor();
}
#[test]
fn f32x4_ceil_requires_sse41() {
// Memory safety issue: this safe API calls x86::_mm_ceil_ps, which requires SSE4.1.
// The x86 backend is selected without enabling or checking SSE4.1, so this is UB on
// targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = F32x4::new(1.25, -2.75, 3.5, -4.5).ceil();
}
#[test]
fn i32x2_min_requires_sse41() {
// Memory safety issue: this safe API routes through x86::_mm_min_epi32, which requires
// SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so this is UB
// on targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = I32x2::new(6, -40).min(I32x2::new(10, 46));
}
#[test]
fn i32x2_max_requires_sse41() {
// Memory safety issue: this safe API routes through x86::_mm_max_epi32, which requires
// SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so this is UB
// on targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = I32x2::new(6, -40).max(I32x2::new(10, 46));
}
#[test]
fn i32x2_mul_requires_sse41() {
// Memory safety issue: this safe operator routes through x86::_mm_mullo_epi32, which
// requires SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so
// this is UB on targets where that feature is unavailable; Miri reports the violation.
let _ = I32x2::new(6, -40) * I32x2::new(10, 46);
}
#[test]
fn i32x4_min_requires_sse41() {
// Memory safety issue: this safe API calls x86::_mm_min_epi32, which requires SSE4.1.
// The x86 backend is selected without enabling or checking SSE4.1, so this is UB on
// targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = I32x4::new(6, 29, -40, 2).min(I32x4::new(10, -5, 10, 46));
}
#[test]
fn i32x4_max_requires_sse41() {
// Memory safety issue: this safe API calls x86::_mm_max_epi32, which requires SSE4.1.
// The x86 backend is selected without enabling or checking SSE4.1, so this is UB on
// targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = I32x4::new(6, 29, -40, 2).max(I32x4::new(10, -5, 10, 46));
}
#[test]
fn i32x4_mul_requires_sse41() {
// Memory safety issue: this safe operator calls x86::_mm_mullo_epi32, which requires
// SSE4.1. The x86 backend is selected without enabling or checking SSE4.1, so this is UB
// on targets where that feature is unavailable; Miri reports the target-feature violation.
let _ = I32x4::new(6, 29, -40, 2) * I32x4::new(10, -5, 10, 46);
}
}
Running
cargo +nightly miri test --releaseon these tests reports UB. These intrinsics require SSE 4.1 but the code didn't check that SSE 4.1 is available.