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4 changes: 2 additions & 2 deletions .ci/Board/Board.clayer.yml
Original file line number Diff line number Diff line change
Expand Up @@ -18,8 +18,8 @@ layer:

packs:
- pack: ARM::Cortex_DFP
- pack: ARM::CMSIS@>=6.1.0
- pack: ARM::CMSIS-Compiler@>=2.1.0
- pack: ARM::CMSIS@^6.2.0
- pack: ARM::CMSIS-Compiler@^2.1.0

components:
- component: Device:Startup
Expand Down
263 changes: 263 additions & 0 deletions .ci/Board/RTE/Device/ARMCM4/ARMCM4_gcc.ld
Original file line number Diff line number Diff line change
@@ -0,0 +1,263 @@
/*
*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
*/

/*---------------------- Flash Configuration ----------------------------------
<h> Flash Configuration
<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__ROM_BASE = 0x00000000;
__ROM_SIZE = 0x00080000;

/*--------------------- Embedded RAM Configuration ----------------------------
<h> RAM Configuration
<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__RAM_BASE = 0x20000000;
__RAM_SIZE = 0x00020000;

/*--------------------- Stack / Heap Configuration ----------------------------
<h> Stack / Heap Configuration
<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__STACK_SIZE = 0x00000400;
__HEAP_SIZE = 0x00000C00;

/*
*-------------------- <<< end of configuration section >>> -------------------
*/

MEMORY
{
FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
}

/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext (deprecated)
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)

SECTIONS
{
.text :
{
KEEP(*(.vectors))
*(.text*)

KEEP(*(.init))
KEEP(*(.fini))

/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)

/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)

*(.rodata*)

KEEP(*(.eh_frame*))
} > FLASH

.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH

__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;

.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;

LONG (LOADADDR(.data))
LONG (ADDR(.data))
LONG (SIZEOF(.data) / 4)

/* Add each additional data section here */
/*
LONG (LOADADDR(.data2))
LONG (ADDR(.data2))
LONG (SIZEOF(.data2) / 4)
*/
__copy_table_end__ = .;
} > FLASH

.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;

/* .bss initialization to zero is already done during C Run-Time Startup.
LONG (ADDR(.bss))
LONG (SIZEOF(.bss) / 4)
*/

/* Add each additional bss section here */
/*
LONG (ADDR(.bss2))
LONG (SIZEOF(.bss2) / 4)
*/
__zero_table_end__ = .;
} > FLASH

/*
* This __etext variable is kept for backward compatibility with older,
* ASM based startup files.
*/
PROVIDE(__etext = LOADADDR(.data));

.data : ALIGN(4)
{
__data_start__ = .;
*(vtable)
*(.data)
*(.data.*)

. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);

. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);

. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);

KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;

} > RAM AT > FLASH

/*
* Secondary data section, optional
*
* Remember to add each additional data section
* to the .copy.table above to assure proper
* initialization during startup.
*/
/*
.data2 : ALIGN(4)
{
. = ALIGN(4);
__data2_start__ = .;
*(.data2)
*(.data2.*)
. = ALIGN(4);
__data2_end__ = .;

} > RAM2 AT > FLASH
*/

.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM AT > RAM

/*
* Secondary bss section, optional
*
* Remember to add each additional bss section
* to the .zero.table above to assure proper
* initialization during startup.
*/
/*
.bss2 :
{
. = ALIGN(4);
__bss2_start__ = .;
*(.bss2)
*(.bss2.*)
. = ALIGN(4);
__bss2_end__ = .;
} > RAM2 AT > RAM2
*/

.heap (NOLOAD) :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
. = . + __HEAP_SIZE;
. = ALIGN(8);
__HeapLimit = .;
} > RAM

.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (NOLOAD) :
{
. = ALIGN(8);
__StackLimit = .;
. = . + __STACK_SIZE;
. = ALIGN(8);
__StackTop = .;
} > RAM
PROVIDE(__stack = __StackTop);

/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}
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