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feat(simd): add ndarray::simd::bf16_tile_gemm_16x16 polyfill primitive#222

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AdaWorldAPI merged 1 commit into
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Jun 21, 2026
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feat(simd): add ndarray::simd::bf16_tile_gemm_16x16 polyfill primitive#222
AdaWorldAPI merged 1 commit into
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claude/charming-johnson-ufstpw

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A 16x16 BF16 tile GEMM (C[16,16] += A[16,K]·B[K,16], K multiple of 32)
built purely from the SIMD polyfill: BF16->f32 decode + F32x16::mul_add.
The F32x16 wrapper owns the per-arch dispatch (AVX-512 VFMADD231PS where
available -> AVX2 pair -> NEON -> scalar), so the kernel rides AMX/AVX-512
hosts automatically. No hpc reference, no AMX intrinsic, no external BLAS.

Lives in src/simd_ops.rs, re-exported via ndarray::simd. Parity test vs an
f32-accumulated scalar reference + a += accumulation test + doctest all
pass on AVX-512; clippy -D warnings + fmt clean.

Co-Authored-By: Claude Opus 4.8 noreply@anthropic.com
Claude-Session: https://claude.ai/code/session_01GJ4NVBSjq1w5h7RmTbVafb

A 16x16 BF16 tile GEMM (`C[16,16] += A[16,K]·B[K,16]`, K multiple of 32)
built purely from the SIMD polyfill: BF16->f32 decode + `F32x16::mul_add`.
The `F32x16` wrapper owns the per-arch dispatch (AVX-512 VFMADD231PS where
available -> AVX2 pair -> NEON -> scalar), so the kernel rides AMX/AVX-512
hosts automatically. No `hpc` reference, no AMX intrinsic, no external BLAS.

Lives in src/simd_ops.rs, re-exported via `ndarray::simd`. Parity test vs an
f32-accumulated scalar reference + a `+=` accumulation test + doctest all
pass on AVX-512; clippy -D warnings + fmt clean.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GJ4NVBSjq1w5h7RmTbVafb
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Comment thread src/simd_ops.rs
Comment on lines +607 to +610
let mut col = vec![0.0f32; k];
for (kk, slot) in col.iter_mut().enumerate() {
*slot = b_f32[kk * 16 + j];
}

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P2 Badge Reuse B column buffers outside the row loop

For each output element (i, j), this allocates and fills a k-element Vec, so one 16×16 tile does 256 heap allocations and repeats the same B-column gather once for every row. In hot tiled GEMM use, especially for small or moderate k, that allocator and memory traffic can dominate the SIMD FMA work; pretranspose/gather the 16 B columns once per call or at least once per j and reuse them across all 16 rows.

Useful? React with 👍 / 👎.

@AdaWorldAPI AdaWorldAPI merged commit 7a8b793 into master Jun 21, 2026
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AdaWorldAPI pushed a commit that referenced this pull request Jun 21, 2026
PR #222 added ndarray::simd::bf16_tile_gemm_16x16 by copying the F32x16
kernel out of hpc::bf16_tile_gemm::fallback_path, leaving the same kernel in
two places. Collapse it: the polyfill fn is the single source of truth; the
hpc AMX wrapper's fallback now calls crate::simd::bf16_tile_gemm_16x16, with
the AMX TDPBF16PS tile path still layered on top. Drops the now-unused
F32x16 / bf16_to_f32_batch import.

Both suites pass (hpc fallback + simd_ops parity); clippy -D warnings + fmt clean.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GJ4NVBSjq1w5h7RmTbVafb
AdaWorldAPI added a commit that referenced this pull request Jun 21, 2026
refactor(hpc): bf16_tile_gemm fallback delegates to the polyfill (dedup of #222)
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