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  • Ho Chi Minh City, Viet Nam

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DanhLent/README.md

Hi there, I'm Danh Le πŸ‘‹πŸ‘‹πŸ‘‹

Computer Engineering @ UIT | Building digital hardware with Verilog & FPGAs. Semiconductor & Computer Architecture Enthusiast.

πŸ“« Connect with me:

Linkedin LinkedIn Β  GitHub GitHub Β  Youtube Youtube

πŸš€ My Pinned Projects

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    An STM32-based audio visualizer for WS2812B Neopixel LED strips.

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  3. RISC-V-CPU-Core RISC-V-CPU-Core Public

    A simple 5-stage pipelined 32-bit RISC-V CPU core implemented in Verilog.

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