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Pull requests: NVlabs/cuda-oxide

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Pull requests list

Fix cargo oxide debug executable discovery
#330 opened Jul 2, 2026 by mohamedsamirx Contributor Loading…
Add mma.sync.aligned.m16n8k32 s8 tensor core intrinsic
#329 opened Jul 2, 2026 by honeyspoon Contributor Loading…
5 tasks done
Add mma.sync.aligned.m16n8k8 tf32 tensor core intrinsic
#328 opened Jul 2, 2026 by honeyspoon Contributor Loading…
5 tasks done
Add mma.sync.aligned.m16n8k16 f16 tensor core intrinsic
#327 opened Jul 2, 2026 by honeyspoon Contributor Loading…
5 tasks done
feat(cuda-macros): collect #[cuda_module] kernels from nested modules
#324 opened Jul 1, 2026 by bitemyapp Loading…
6 tasks done
feat: add compile-time kernel policy primitives codegen Device code-generation pipeline (Rust MIR to IR to PTX) Depends Blocked on another PR/issue or an upstream dependency device-apis User-facing device-side and kernel-authoring APIs (cuda-device, cuda-macros) enhancement New feature or request perf Performance of generated code or of the compiler itself
#320 opened Jul 1, 2026 by nihalpasham Collaborator Loading…
feat: add proof-carrying device views codegen Device code-generation pipeline (Rust MIR to IR to PTX) Depends Blocked on another PR/issue or an upstream dependency device-apis User-facing device-side and kernel-authoring APIs (cuda-device, cuda-macros) enhancement New feature or request host-apis Host-side runtime APIs (cuda-host, cuda-core, cuda-async) llvm-export Textual LLVM/NVVM IR exporter (llvm-export crate) perf Performance of generated code or of the compiler itself safety Memory safety, soundness, or undefined behavior
#319 opened Jul 1, 2026 by nihalpasham Collaborator Loading…
5 of 7 tasks
feat: add typed kernel launch contracts codegen Device code-generation pipeline (Rust MIR to IR to PTX) device-apis User-facing device-side and kernel-authoring APIs (cuda-device, cuda-macros) enhancement New feature or request host-apis Host-side runtime APIs (cuda-host, cuda-core, cuda-async) IR-lowering Lowering between dialects (dialect-mir to LLVM dialect) safety Memory safety, soundness, or undefined behavior
#318 opened Jul 1, 2026 by nihalpasham Collaborator Loading…
4 of 5 tasks
mir-importer: non-rustc compile_module_to_ptx entry codegen Device code-generation pipeline (Rust MIR to IR to PTX) enhancement New feature or request interop Interop with external compilers / frontends IR-lowering Lowering between dialects (dialect-mir to LLVM dialect) maintainer-owned miscompile Produces incorrect PTX/IR (wrong generated code) on-hold Paused: valid but deferred until a prerequisite decision or dependency resolves safety Memory safety, soundness, or undefined behavior
#314 opened Jun 30, 2026 by alejandro-soto-franco Contributor Loading…
Add experimental CUDA program graph macro device-apis User-facing device-side and kernel-authoring APIs (cuda-device, cuda-macros) enhancement New feature or request examples Example kernels and host harnesses under crates/rustc-codegen-cuda/examples host-apis Host-side runtime APIs (cuda-host, cuda-core, cuda-async) safety Memory safety, soundness, or undefined behavior
#308 opened Jun 28, 2026 by DaronPopov Contributor Loading…
feat: add a CUDA_OXIDE_POST_IR hook for external IR transforms codegen Device code-generation pipeline (Rust MIR to IR to PTX) enhancement New feature or request interop Interop with external compilers / frontends
#159 opened Jun 11, 2026 by ianrgraham Draft
ProTip! Exclude everything labeled bug with -label:bug.