Switch to coarse-grained managed HIP allocations by default#63
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vikaskurapati
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Apr 7, 2026
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I don't have an AMD device to test this right now. But LGTM.
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Make "unsafe" atomic operations work (as used on gfx90a or some RDNA cards) with managed memory; like they would work with extra "device" memory.
Comes at the downside that the data is only "properly" visible after some synchronization; which should always be ensured in our case right now (i.e. accessing the data only when no kernel is running).