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Embedded Hotel Safe System

Proteus Circuit Simulation

A C++ based embedded security system featuring a Finite State Machine (FSM) architecture and hardware interrupt handling. This project simulates a dual-partition hotel safe with multi-level authentication and penalty logic. This project is developed for the EE321 Microprocessors course at Ozyegin University. Main goal was implementing real-time control logic and hardware interfacing using low-level microcontroller features.

Key Features

  • FSM Architecture: Robust state management (Welcome, Locked, Time-out) prevents invalid transitions.
  • Hardware Interrupts (ISR): Uses TIMER1 and direct register access for non-blocking security counters.
  • Dual-Section Logic: Independent control for two separate safe compartments.
  • Bait Password: Triggers a silent "Emergency LED" alarm while appearing to open the safe normally.
  • Penalty System: Enforces a 20-second lockout after 3 consecutive failed attempts.

Tech Stack & Hardware

  • Language: C++ (Arduino Framework)
  • Microcontroller: ATmega328P (Arduino Uno/Nano)
  • Components: 4x3 Keypad, 16x2 LCD, L293D Motor Driver, DC Motors.
  • Concepts: Register Manipulation, Interrupt Service Routines, Finite State Machines.

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A C++ based embedded security system featuring a Finite State Machine (FSM) architecture, hardware timer interrupts for penalty logic, and multi-level authentication.

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