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Merged
Lencerf merged 1 commit into from
Feb 8, 2026
Merged

refactor: introduce custom bitflags! macro #393

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34 changes: 16 additions & 18 deletions alioth/src/arch/aarch64/reg.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,8 @@
// limitations under the License.

use bitfield::bitfield;
use bitflags::bitflags;

use crate::consts;
use crate::{bitflags, consts};

#[derive(Debug, Copy, Clone, PartialEq, Eq)]
pub enum Reg {
Expand Down Expand Up @@ -82,33 +81,32 @@ consts! {

// https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/Processor-state
bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Pstate: u32 {
pub struct Pstate(u32) {
/// Negative condition flag.
const N = 1 << 31;
N = 1 << 31;
/// Zero condition flag.
const Z = 1 << 30;
Z = 1 << 30;
/// Carry condition flag.
const C = 1 << 29;
C = 1 << 29;
/// oVerflow condition flag.
const V = 1 << 28;
V = 1 << 28;
/// Debug mask bit.
/// Software Step bit.
const SS = 1 << 21;
SS = 1 << 21;
/// Illegal execution state bit.
const IL = 1 << 20;
const D = 1 << 9;
IL = 1 << 20;
D = 1 << 9;
/// SError mask bit.
const A = 1 << 8;
A = 1 << 8;
/// IRQ mask bit.
const I = 1 << 7;
I = 1 << 7;
/// FIQ mask bit.
const F = 1 << 6;
const M = 1 << 4;
F = 1 << 6;
M = 1 << 4;

const EL_BIT3 = 1 << 3;
const EL_BIT2 = 1 << 2;
const EL_H = 1 << 0;
EL_BIT3 = 1 << 3;
EL_BIT2 = 1 << 2;
EL_H = 1 << 0;
}
}

Expand Down
19 changes: 9 additions & 10 deletions alioth/src/arch/x86_64/msr.rs
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Expand Up @@ -13,7 +13,8 @@
// limitations under the License.

use bitfield::bitfield;
use bitflags::bitflags;

use crate::bitflags;

// Intel Vol.4, Table 2-2.
pub const IA32_EFER: u32 = 0xc000_0080;
Expand All @@ -28,24 +29,22 @@ pub const IA32_TSC_AUX: u32 = 0xc000_0103;
pub const IA32_MISC_ENABLE: u32 = 0x0000_01a0;

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Efer: u32 {
pub struct Efer(u32) {
/// SYSCALL enable
const SCE = 1 << 0;
SCE = 1 << 0;
/// IA-32e mode enable
const LME = 1 << 8;
LME = 1 << 8;
/// IA-32e mode active
const LMA = 1 << 10;
LMA = 1 << 10;
/// Execute disable bit enable
const NXE = 1 << 11;
NXE = 1 << 11;
}
}

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct MiscEnable: u64 {
pub struct MiscEnable(u64) {
/// Enable Fast-Strings
const FAST_STRINGS = 1 << 0;
FAST_STRINGS = 1 << 0;
}
}

Expand Down
23 changes: 11 additions & 12 deletions alioth/src/arch/x86_64/paging.rs
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Expand Up @@ -12,28 +12,27 @@
// See the License for the specific language governing permissions and
// limitations under the License.

use bitflags::bitflags;
use crate::bitflags;

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Entry: u32 {
pub struct Entry(u32) {
/// Present
const P = 1 << 0;
P = 1 << 0;
/// Read/write
const RW = 1 << 1;
RW = 1 << 1;
/// User/supervisor
const US = 1 << 2;
US = 1 << 2;
/// Page-level write-through
const PWT = 1 << 3;
PWT = 1 << 3;
/// Page-level cache disable
const PCD = 1 << 4;
PCD = 1 << 4;
/// Accessed
const A = 1 << 5;
A = 1 << 5;
/// Dirty
const D = 1 << 6;
D = 1 << 6;
/// Page size
const PS = 1 << 7;
PS = 1 << 7;
/// Global
const G = 1 << 8;
G = 1 << 8;
}
}
127 changes: 62 additions & 65 deletions alioth/src/arch/x86_64/reg.rs
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Expand Up @@ -13,141 +13,138 @@
// limitations under the License.

use bitfield::bitfield;
use bitflags::bitflags;

use crate::bitflags;

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Rflags: u32 {
pub struct Rflags(u32) {
/// CarryCarry flag
const CF = 1 << 0;
CF = 1 << 0;
/// CarryReserved
const RESERVED_1 = 1 << 1;
RESERVED_1 = 1 << 1;
/// CarryParity flag
const PF = 1 << 2;
PF = 1 << 2;
/// CarryAuxiliary Carry flag
const AF = 1 << 4;
AF = 1 << 4;
/// CarryZero flag
const ZF = 1 << 6;
ZF = 1 << 6;
/// CarrySign flag
const SF = 1 << 7;
SF = 1 << 7;
/// CarryTrap flag
const TF = 1 << 8;
TF = 1 << 8;
/// CarryInterrupt enable flag
const IF = 1 << 9;
IF = 1 << 9;
/// CarryDirection flag
const DF = 1 << 10;
DF = 1 << 10;
/// CarryOverflow flag
const OF = 1 << 11;
OF = 1 << 11;
/// CarryI/O privilege level
const IOPL = 1 << 13;
IOPL = 1 << 13;
/// CarryNested task flag
const NT = 1 << 14;
NT = 1 << 14;
/// CarryResume flag
const RF = 1 << 16;
RF = 1 << 16;
/// CarryVirtual 8086 mode flag
const VM = 1 << 17;
VM = 1 << 17;
/// CarryAlignment Check
const AC = 1 << 18;
AC = 1 << 18;
/// CarryVirtual interrupt flag
const VIF = 1 << 19;
VIF = 1 << 19;
/// CarryVirtual interrupt pending
const VIP = 1 << 20;
VIP = 1 << 20;
/// CarryIdentification flag
const ID = 1 << 21;
ID = 1 << 21;
}
}

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Cr0: u32 {
pub struct Cr0(u32) {
/// CarryProtected Mode Enable
const PE = 1 << 0;
PE = 1 << 0;
/// CarryMonitor co-processor
const MP = 1 << 1;
MP = 1 << 1;
/// CarryEmulation
const EM = 1 << 2;
EM = 1 << 2;
/// CarryTask switched
const TS = 1 << 3;
TS = 1 << 3;
/// CarryExtension type
const ET = 1 << 4;
ET = 1 << 4;
/// CarryNumeric error
const NE = 1 << 5;
NE = 1 << 5;
/// CarryWrite protect
const WP = 1 << 16;
WP = 1 << 16;
/// CarryAlignment mask
const AM = 1 << 18;
AM = 1 << 18;
/// CarryNot-write through
const NW = 1 << 29;
NW = 1 << 29;
/// CarryCache disable
const CD = 1 << 30;
CD = 1 << 30;
/// CarryPaging
const PG = 1 << 31;
PG = 1 << 31;
}
}

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Cr3: u64 {
pub struct Cr3(u64) {
/// CarryPage-level write-through
const PWT = 1 << 3;
PWT = 1 << 3;
/// CarryPage-level Cache disable
const PCD = 1 << 4;
PCD = 1 << 4;
}
}

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct Cr4: u32 {
pub struct Cr4(u32) {
/// CarryVirtual 8086 Mode Extensions
const VME = 1 << 0;
VME = 1 << 0;
/// CarryProtected-mode Virtual Interrupts
const PVI = 1 << 1;
PVI = 1 << 1;
/// CarryTime Stamp Disable
const TSD = 1 << 2;
TSD = 1 << 2;
/// CarryDebugging Extensions
const DE = 1 << 3;
DE = 1 << 3;
/// CarryPage Size Extension
const PSE = 1 << 4;
PSE = 1 << 4;
/// CarryPhysical Address Extension
const PAE = 1 << 5;
PAE = 1 << 5;
/// CarryMachine Check Exception
const MCE = 1 << 6;
MCE = 1 << 6;
/// CarryPage Global Enabled
const PGE = 1 << 7;
PGE = 1 << 7;
/// CarryPerformance-Monitoring Counter enable
const PCE = 1 << 8;
PCE = 1 << 8;
/// CarryOperating system support for FXSAVE and FXRSTOR instructions
const OSFXSR = 1 << 9;
OSFXSR = 1 << 9;
/// CarryOperating System Support for Unmasked SIMD Floating-Point Exceptions
const OSXMMEXCPT = 1 << 10;
OSXMMEXCPT = 1 << 10;
/// CarryUser-Mode Instruction Prevention
const UMIP = 1 << 11;
UMIP = 1 << 11;
/// Carry57-Bit Linear Addresses
const LA57 = 1 << 12;
LA57 = 1 << 12;
/// CarryVirtual Machine Extensions Enable
const VMXE = 1 << 13;
VMXE = 1 << 13;
/// CarrySafer Mode Extensions Enable
const SMXE = 1 << 14;
SMXE = 1 << 14;
/// CarryFSGSBASE Enable
const FSGSBASE = 1 << 16;
FSGSBASE = 1 << 16;
/// CarryPCID Enable
const PCIDE = 1 << 17;
PCIDE = 1 << 17;
/// CarryXSAVE and Processor Extended States Enable
const OSXSAVE = 1 << 18;
OSXSAVE = 1 << 18;
/// CarryKey Locker Enable
const KL = 1 << 19;
KL = 1 << 19;
/// CarrySupervisor Mode Execution Protection Enable
const SMEP = 1 << 20;
SMEP = 1 << 20;
/// CarrySupervisor Mode Access Prevention Enable
const SMAP = 1 << 21;
SMAP = 1 << 21;
/// CarryProtection Key Enable
const PKE = 1 << 22;
PKE = 1 << 22;
/// CarryControl-flow Enforcement Technology
const CET = 1 << 23;
CET = 1 << 23;
/// CarryEnable Protection Keys for Supervisor-Mode Pages
const PKS = 1 << 24;
PKS = 1 << 24;
/// CarryUser Interrupts Enable
const UINTR = 1 << 25;
UINTR = 1 << 25;
}
}

Expand Down
13 changes: 6 additions & 7 deletions alioth/src/arch/x86_64/tdx.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,14 +12,13 @@
// See the License for the specific language governing permissions and
// limitations under the License.

use bitflags::bitflags;
use crate::bitflags;

bitflags! {
#[derive(Default, Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct TdAttr: u64 {
const DEBUG = 1 << 0;
const SEPT_VE_DISABLE = 1 << 28;
const PKS = 1 << 30;
const PERFMON = 1 << 63;
pub struct TdAttr(u64) {
DEBUG = 1 << 0;
SEPT_VE_DISABLE = 1 << 28;
PKS = 1 << 30;
PERFMON = 1 << 63;
}
}
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