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[ADR] Path-sensitive loop control-flow and first-iteration sync convergence#607

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TaoTao-real wants to merge 2 commits intohw-native-sys:mainfrom
TaoTao-real:codex/adr-loop-controlflow-firstiter-sync
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[ADR] Path-sensitive loop control-flow and first-iteration sync convergence#607
TaoTao-real wants to merge 2 commits intohw-native-sys:mainfrom
TaoTao-real:codex/adr-loop-controlflow-firstiter-sync

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@TaoTao-real
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Summary

  • Add a new ADR that designs path-sensitive sync convergence for loop-internal control flow and first-iteration specialization scenarios in InsertSync.
  • The ADR targets reducing conservative loop-carried sync (seed/drain + event chains) while preserving correctness.

Motivation

  • Architect request: track a robust, non-MVP framework-level design for loop + if/else + first-iter synchronization conservatism.
  • This complements existing ADRs for canonical-writer/memory-phi and VF barrier coarsening.

Design

  • New ADR: docs/designs/ptoas-loop-controlflow-firstiter-sync-optimization-adr.md
  • Core decisions:
    • Introduce predicate-domain modeling for SyncIR nodes.
    • Introduce iteration classes (FirstIter, SteadyIter, SingleTrip, UnknownTrip).
    • Only build loop-carried deps/seed-drain when cross-iteration deps are real and predicate-satisfiable.
    • Reuse canonical logical writer (memory-phi / canonical-writer) to avoid duplicated dependency edges at branch joins.
    • Constrain sync motion (hoist/sink) within the tightest common control scope to preserve set/wait pairing semantics.

Testing

  • Docs-only change; no code path changed in this PR.
  • The ADR includes a concrete validation matrix and mandatory regression gates for implementation PRs:
    • issue428/issue454/issue533 regressions
    • loop first-iter specialization and single-trip suppression cases
    • debug counters for loop-carried candidate/confirmed/suppressed signals

Risk / Rollback

  • Risk: none for runtime behavior (documentation-only).
  • Rollback: revert this single commit.

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Code Review

This pull request introduces an Architecture Decision Record (ADR) for optimizing loop control flow and first-iteration specialization within the InsertSync analysis layer. The proposed design utilizes path-sensitive dependency analysis, iteration classification (FirstIter, SteadyIter, SingleTrip), and logical writer mapping to eliminate redundant synchronization. Review feedback highlighted several critical areas for refinement: the need for a fallback strategy for predicate domain bit-vectors to maintain compilation performance, clarification on dependencies originating in the first iteration that affect subsequent iterations, and the requirement for post-dominance analysis to prevent deadlocks in complex control flows with multiple exits.

## 5.2 关键数据结构

1. `PredicateToken`:原子谓词(如 `if#k.then`、`if#k.else`、`loop#j.first`、`loop#j.steady`)。
2. `PredicateDomain`:`SmallBitVector` 或 CNF-lite 集合,用于 `IntersectIsSat()`。
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medium

PredicateDomain 的设计中提到使用 SmallBitVector。考虑到复杂 Kernel 可能存在大量嵌套分支,建议明确当谓词数量超过 SmallBitVector 预设容量或分析复杂度过高时的降级策略(例如回退到保守的 'Unknown' 状态),以防止编译性能显著下降。

2. 存在 `iter(k)` 到 `iter(k+1)` 的真实可达冲突。
3. 该冲突在谓词域上可满足。

若只在 `FirstIter` 内成立,不视为 loop-carried。
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medium

“若只在 FirstIter 内成立,不视为 loop-carried”这一表述可能存在歧义。需要明确区分“仅在首迭代内部发生的依赖”与“由首迭代产生并被后续迭代消费的依赖”。后者虽然由首迭代触发,但本质上仍属于跨迭代依赖,需要 seed 同步。建议在此处补充对初始化路径跨迭代影响的处理逻辑说明。


1. wait 外提不得越过其匹配 set 的共同控制域入口。
2. set 下沉不得越过其匹配 wait 的共同控制域出口。
3. 若移动后存在“可能执行 wait 但不执行 set”或反向情况,禁止移动。
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medium

关于同步移动的约束,提到“可能执行 wait 但不执行 set”的情况。在包含 breakcontinue 或多出口 Loop 的复杂控制流中,仅靠 LCA 检查可能不足以保证同步安全性。建议明确引入“必须执行(Must-execute)”或“后支配(Post-dominance)”关系的判定准则,以确保在所有可能的执行路径上 set/wait 始终配对,避免死锁。

@reedhecre
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reedhecre commented Apr 30, 2026

Codex Review

该评论由 review 机器人自动更新。

Summary

未检查到 PR #607 存在问题

Findings

No issues found.

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