[ADR] Path-sensitive loop control-flow and first-iteration sync convergence#607
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This pull request introduces an Architecture Decision Record (ADR) for optimizing loop control flow and first-iteration specialization within the InsertSync analysis layer. The proposed design utilizes path-sensitive dependency analysis, iteration classification (FirstIter, SteadyIter, SingleTrip), and logical writer mapping to eliminate redundant synchronization. Review feedback highlighted several critical areas for refinement: the need for a fallback strategy for predicate domain bit-vectors to maintain compilation performance, clarification on dependencies originating in the first iteration that affect subsequent iterations, and the requirement for post-dominance analysis to prevent deadlocks in complex control flows with multiple exits.
| ## 5.2 关键数据结构 | ||
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| 1. `PredicateToken`:原子谓词(如 `if#k.then`、`if#k.else`、`loop#j.first`、`loop#j.steady`)。 | ||
| 2. `PredicateDomain`:`SmallBitVector` 或 CNF-lite 集合,用于 `IntersectIsSat()`。 |
| 2. 存在 `iter(k)` 到 `iter(k+1)` 的真实可达冲突。 | ||
| 3. 该冲突在谓词域上可满足。 | ||
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| 若只在 `FirstIter` 内成立,不视为 loop-carried。 |
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| 1. wait 外提不得越过其匹配 set 的共同控制域入口。 | ||
| 2. set 下沉不得越过其匹配 wait 的共同控制域出口。 | ||
| 3. 若移动后存在“可能执行 wait 但不执行 set”或反向情况,禁止移动。 |
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Summary未检查到 PR #607 存在问题 FindingsNo issues found. |
Summary
Motivation
loop + if/else + first-itersynchronization conservatism.Design
docs/designs/ptoas-loop-controlflow-firstiter-sync-optimization-adr.mdFirstIter,SteadyIter,SingleTrip,UnknownTrip).Testing
Risk / Rollback