Add auto cv pipeline mulit buffer enable and preload support

include/PTO/IR/PTOOps.td

@@ -1328,6 +1328,25 @@ class PTO_SectionOp<string mnemonic>
 def SectionCubeOp : PTO_SectionOp<"section.cube">;
 def SectionVectorOp : PTO_SectionOp<"section.vector">;
 
+//===----------------------------------------------------------------------===//
+// CV Preload Scope Ops
+//===----------------------------------------------------------------------===//
+
+def CVScopeOp : PTO_Op<"cv.scope", [SingleBlock, NoTerminator]> {
+  let summary = "No-result CV preload transaction scope";
+  let description = [{
+    Groups one producer, consumer, or relay TPipe transaction for CV preload
+    analysis.  The first PTOAS version intentionally carries no operands,
+    results, or yield terminator: cross-scope dependencies are represented by
+    explicit TPipe metadata such as pto.cv.input_pipe and pto.cv.output_pipe,
+    while tilebuf/memref allocations that are shared across scopes must be
+    defined outside the scope.
+  }];
+
+  let regions = (region SizedRegion<1>:$body);
+  let assemblyFormat = "$body attr-dict";
+}
+
 //===----------------------------------------------------------------------===//
 // Frontend TPUSH/TPOP Pipe Communication Ops
 //===----------------------------------------------------------------------===//

include/PTO/Transforms/GraphSyncSolver/SyncSolver.h

@@ -85,7 +85,21 @@ class Solver {
   void handleBarrierConflict(Occurrence *occ1, Occurrence *occ2,
                              CorePipeInfo src, CorePipeInfo dst);
   void handleSetWaitConflict(Occurrence *occ1, Occurrence *occ2,
-                             CorePipeInfo src, CorePipeInfo dst);
+                             CorePipeInfo src, CorePipeInfo dst,
+                             RWOperation *rwOp1 = nullptr,
+                             RWOperation *rwOp2 = nullptr);
+
+  // Multi-buffer event-id deduction (HIVM-style, intra-core only):
+  //   - getMultiBufferLoop:        find the common scf.for whose iv the slot
+  //                                rotation will key on.
+  //   - getMultiBufferEventIdInfo: per-pair MB eligibility check + N derivation
+  //                                via `getMultiBufferSlotCount`.
+  //   - getEventIdInfo:            top-level wrapper. Backward-only gate, then
+  //                                MB check, default to single-buffer (N=1).
+  scf::ForOp getMultiBufferLoop(RWOperation *rwOp1, RWOperation *rwOp2);
+  EventIdInfo getMultiBufferEventIdInfo(RWOperation *rwOp1, RWOperation *rwOp2);
+  EventIdInfo getEventIdInfo(Occurrence *occ1, Occurrence *occ2,
+                             RWOperation *rwOp1, RWOperation *rwOp2);
 
   // Conservative memory dependence between two RWOperation; produces
   // (setCorePipeInfo, waitCorePipeInfo) tuples for each detected conflict.

include/PTO/Transforms/GraphSyncSolver/SyncSolverCodeGen.h

@@ -22,8 +22,12 @@
 #include "PTO/Transforms/GraphSyncSolver/SyncSolverIR.h"
 #include "PTO/Transforms/GraphSyncSolver/Utility.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"
+#include "mlir/Dialect/SCF/IR/SCF.h"
 #include "mlir/IR/PatternMatch.h"
+#include "mlir/IR/Value.h"
+#include "llvm/ADT/DenseMap.h"
 #include <memory>
+#include <utility>
 
 namespace mlir {
 namespace pto {
@@ -58,6 +62,19 @@ class CodeGenerator {
                       bool insertAfter);
   void insertBarrier(IRRewriter &rewriter, OperationBase *anchor, PIPE pipe,
                      bool insertAfter);
+
+  // Multi-buffer codegen helpers (HIVM-aligned).
+  // emitMultiBufferSetWait: for a ConflictPair with eventIdNum > 1 emits a
+  // dyn-event-id (`pto.set_flag_dyn` / `pto.wait_flag_dyn`) pair driven by an
+  // `iv mod N` selector + arith.select chain over the assigned event ids.
+  void emitMultiBufferSetWait(IRRewriter &rewriter, ConflictPair *cp);
+
+  // Reuse the same `iv mod N` counter across multiple ConflictPairs that
+  // share a (loop, N) tuple (mirrors PTOEnableMultiBuffer's loop2BufferCounter
+  // and the InsertSync SyncCodegen cache).
+  Value getOrCreateLoopCounter(IRRewriter &rewriter, scf::ForOp forOp,
+                               int64_t n, Location loc);
+  llvm::DenseMap<std::pair<scf::ForOp, int64_t>, Value> loop2BufferCounter_;
 };
 
 } // namespace syncsolver

include/PTO/Transforms/GraphSyncSolver/Utility.h

@@ -26,6 +26,8 @@
 
 #include "PTO/IR/PTO.h"
 #include "PTO/Transforms/GraphSyncSolver/SyncSolverIR.h"
+#include "mlir/Dialect/SCF/IR/SCF.h"
+#include "mlir/Interfaces/LoopLikeInterface.h"
 #include "llvm/ADT/DenseMapInfo.h"
 #include "llvm/ADT/SmallVector.h"
 #include <climits>
@@ -100,6 +102,25 @@ struct SyncSolverOptions {
 struct EventIdNode;
 struct ConflictPair;
 
+// Per-conflict outcome of multi-buffer event-id deduction. Mirrors HIVM's
+// `EventIdInfo` (intra-core fields only - cross-core unroll/preload are out
+// of scope for the PTOAS port).
+struct EventIdInfo {
+  // Number of distinct event ids needed per back-edge sync. 1 means "single
+  // buffer" and the existing single-id coloring path is used.
+  int64_t eventIdNum{1};
+  // Loop whose induction variable drives the `iv mod N` slot selector at
+  // codegen. Null when `eventIdNum == 1`.
+  scf::ForOp multibufferLoop{nullptr};
+
+  EventIdInfo() = default;
+  explicit EventIdInfo(int64_t n) : eventIdNum(n) {}
+  EventIdInfo(int64_t n, scf::ForOp loop)
+      : eventIdNum(n), multibufferLoop(loop) {}
+
+  bool isMultiBuffer() const { return eventIdNum > 1 && multibufferLoop; }
+};
+
 // One DFS appearance of an OperationBase in the syncIr stream.
 struct Occurrence {
   OperationBase *op{nullptr};
@@ -172,7 +193,15 @@ struct ConflictPair {
   bool isBarrierAll{false}; // fallback marker: emit pto.barrier <PIPE_ALL>
 
   EventIdNode *eventIdNode{nullptr};
+  // Snapshot of event ids assigned to this pair, taken when CodeGenerator is
+  // constructed (after which eventIdNode is no longer safe to read because
+  // EventIdSolver may have torn down its nodes). Upstream fix for the GSS
+  // event-id-lifetime bug.
   llvm::SmallVector<int64_t> eventIds;
+  // Multi-buffer geometry chosen for this candidate (default = single buffer).
+  // When `eventIdInfo.isMultiBuffer()`, codegen emits dyn flag ops with an
+  // `iv mod N` arith.select chain over the assigned event ids.
+  EventIdInfo eventIdInfo;
 
   ConflictPair(RWOperation *op1, RWOperation *op2, OperationBase *setOp,
                OperationBase *waitOp, Occurrence *setOcc, Occurrence *waitOcc,

include/PTO/Transforms/InsertSync/InsertSyncAnalysis.h

@@ -159,8 +159,13 @@ class InsertSyncAnalysis {
                             const CompoundInstanceElement *frontCompound,
                             bool isBackwardDep) const;
 
-  /// 获取依赖对涉及的 Event ID 数量 (用于 Multi-Buffer 分析)
-  int GetEventIdNum(const DepBaseMemInfoPairVec &depBaseMemInfosVec);
+  /// Multi-buffer event-id deduction (HIVM-style). `backEdgeForLoop`, when
+  /// non-null, is the scf.for whose back-edge this dependency crosses; the
+  /// deduction additionally requires every involved buffer to live directly
+  /// under that loop. If null (forward dep), the deduction is a no-op and
+  /// returns 1.
+  int GetEventIdNum(const DepBaseMemInfoPairVec &depBaseMemInfosVec,
+                    Operation *backEdgeForLoop = nullptr);
 
   /// 辅助函数：获取所有涉及的 Buffer (用于 LCA 计算，虽然现在简化了，保留接口)
   SmallVector<Value> GetMemInfoBuffers(const DepBaseMemInfoPairVec &depBaseMemInfosVec);

include/PTO/Transforms/InsertSync/MemoryDependentAnalyzer.h

@@ -23,21 +23,29 @@ class MemoryDependentAnalyzer {
 public:
   MemoryDependentAnalyzer() = default;
   ~MemoryDependentAnalyzer() = default;
- 
+
   // 检查两组内存信息之间是否存在依赖
   bool DepBetween(const SmallVector<const BaseMemInfo *> &a,
                   const SmallVector<const BaseMemInfo *> &b,
                   DepBaseMemInfoPairVec &depBaseMemInfosVec);
- 
+
   // 检查两个具体的 MemInfo 是否别名
   bool MemAlias(const BaseMemInfo *a, const BaseMemInfo *b);
-
+
+  /// Multi-buffer eligibility for a dependent pair: HIVM requires both sides
+  /// to expose N>=2 byte-offset slots, sizes equal, **every same-index slot
+  /// overlaps** (the real cross-iteration dep) and **no different-index slot
+  /// overlaps** (so consecutive iterations land in disjoint physical buffers).
+  /// Returns N when eligible, otherwise 0.
+  unsigned getMultiBufferSlotCount(const BaseMemInfo *a,
+                                   const BaseMemInfo *b);
+
 private:
   bool isGMBufferOverlap(const BaseMemInfo *a, const BaseMemInfo *b);
-  
+
   bool isBufferAddressRangeOverlap(const BaseMemInfo *a, const BaseMemInfo *b);
-  
-  bool isBufferOverlap(const BaseMemInfo *a, const BaseMemInfo *b, 
+
+  bool isBufferOverlap(const BaseMemInfo *a, const BaseMemInfo *b,
                        int aIndex, int bIndex);
 };
 

include/PTO/Transforms/InsertSync/SyncCodegen.h

@@ -84,8 +84,8 @@ class SyncCodegen {
   // 记录 Op -> Sync 的映射
   DenseMap<const Operation *, SyncPipeBuild> op2InsertSync;
 
-  // 记录 Loop -> Counter 的映射 (缓存)
-  DenseMap<Operation *, Value> loop2BufferCounter;
+  // 记录 Loop -> ( Counter value , modulo N ) 的映射 (缓存)
+  DenseMap<Operation *, std::pair<Value, unsigned>> loop2BufferCounter;
 
   // 记录 SyncIndex -> EventID Value 的映射 (缓存)
   DenseMap<unsigned, Value> SyncIndex2SelectBuffer;
@@ -97,4 +97,4 @@ class SyncCodegen {
 } // namespace pto
 } // namespace mlir
 
-#endif // MLIR_DIALECT_PTO_TRANSFORMS_INJECTSYNC_SYNCCODEGEN_HN_H
+#endif // MLIR_DIALECT_PTO_TRANSFORMS_INJECTSYNC_SYNCCODEGEN_H

include/PTO/Transforms/InsertSync/SyncCommon.h

@@ -86,9 +86,11 @@ enum class TCoreType {
 struct BaseMemInfo {
   BaseMemInfo(
       Value baseBuffer, Value rootBuffer, pto::AddressSpace scope,
-      SmallVector<uint64_t> baseAddresses, uint64_t allocateSize)
+      SmallVector<uint64_t> baseAddresses, uint64_t allocateSize,
+      bool hasVariableAddress = false)
       : baseBuffer(baseBuffer), rootBuffer(rootBuffer), scope(scope),
-        baseAddresses(std::move(baseAddresses)), allocateSize(allocateSize) {}
+        baseAddresses(std::move(baseAddresses)), allocateSize(allocateSize),
+        hasVariableAddress(hasVariableAddress) {}
 
   /// baseBuffer: 当前操作直接使用的 Buffer (可能是 View 或 Alias)
   Value baseBuffer;
@@ -98,6 +100,8 @@ struct BaseMemInfo {
   pto::AddressSpace scope;
   SmallVector<uint64_t> baseAddresses; // 用于 Offset 分析
   uint64_t allocateSize;
+  /// True when pointer/workspace addresses are not compile-time constants.
+  bool hasVariableAddress{false};
 
   bool areVectorEqual(const SmallVector<uint64_t>& vec1,
                       const SmallVector<uint64_t>& vec2) const {
@@ -116,17 +120,20 @@ struct BaseMemInfo {
     // 但为了保持原有逻辑，先保留。重点是 rootBuffer 必须一致。
     if (allocateSize != other.allocateSize) return false;
     if (baseBuffer != other.baseBuffer) return false;
+    if (hasVariableAddress != other.hasVariableAddress) return false;
     return true;
   }
 
   std::unique_ptr<BaseMemInfo> clone() const {
     return std::make_unique<BaseMemInfo>(
-        baseBuffer, rootBuffer, scope, baseAddresses, allocateSize);
+        baseBuffer, rootBuffer, scope, baseAddresses, allocateSize,
+        hasVariableAddress);
   }
 
   std::unique_ptr<BaseMemInfo> clone(Value cloneBaseBuffer) const {
     return std::make_unique<BaseMemInfo>(
-        cloneBaseBuffer, rootBuffer, scope, baseAddresses, allocateSize);
+        cloneBaseBuffer, rootBuffer, scope, baseAddresses, allocateSize,
+        hasVariableAddress);
   }
 };
 

include/PTO/Transforms/MultiBuffer.h

@@ -0,0 +1,29 @@
+// Copyright (c) 2026 Huawei Technologies Co., Ltd.
+// This program is free software, you can redistribute it and/or modify it under the terms and conditions of
+// CANN Open Software License Agreement Version 2.0 (the "License").
+// Please refer to the License for details. You may not use this file except in compliance with the License.
+// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
+// INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
+// See LICENSE in the root of the software repository for the full text of the License.
+
+#ifndef PTO_TRANSFORMS_MULTIBUFFER_H
+#define PTO_TRANSFORMS_MULTIBUFFER_H
+
+#include "llvm/ADT/StringRef.h"
+
+namespace mlir {
+namespace pto {
+
+/// Attribute name for multi-buffer depth on `memref.alloc` (integer slot count N>=2).
+inline constexpr llvm::StringLiteral kPtoMultiBufferAttrName = "pto.multi_buffer";
+
+/// Upper bound for N; must stay consistent with `MAX_MULTI_BUFFER_NUM` in
+/// insert-sync's SyncCommon.h. The static_assert that pins these two values
+/// together lives in PTOPlanMemory.cpp (which already includes both headers)
+/// so this header stays cheap to include from CV/multi-buffer paths.
+inline constexpr unsigned kPtoMultiBufferMaxNum = 16;
+
+} // namespace pto
+} // namespace mlir
+
+#endif // PTO_TRANSFORMS_MULTIBUFFER_H

include/PTO/Transforms/Passes.h

@@ -37,6 +37,10 @@ std::unique_ptr<Pass> createLoweringSyncToPipePass();
 std::unique_ptr<Pass> createPTOAssignDefaultFrontendPipeIdPass();
 std::unique_ptr<Pass> createPTOLowerFrontendPipeOpsPass();
 std::unique_ptr<Pass> createPTOInferValidatePipeInitPass();
+std::unique_ptr<Pass> createPTOCVAutoMarkMultiBufferPass();
+std::unique_ptr<Pass> createPTOCVMarkPreloadScopesPass();
+std::unique_ptr<Pass> createPTOCVCreatePreloadPass();
+std::unique_ptr<Pass> createPTOInlineCVPreloadScopesPass();
 std::unique_ptr<Pass> createPTOResolveReservedBuffersPass();
 std::unique_ptr<Pass> createPTOWrapFunctionsInSectionsPass();
 std::unique_ptr<Pass> createPTOVerifyTFreePass();
@@ -65,6 +69,7 @@ std::unique_ptr<Pass>
 createPlanMemoryPass(const PlanMemoryOptions &planMemoryOption = {});
 
 std::unique_ptr<Pass> createPTORemoveRedundantBarrierPass();
+std::unique_ptr<Pass> createPTOEnableMultiBufferPass();
 std::unique_ptr<Pass> createPTOViewToMemrefPass();
 std::unique_ptr<Pass> createInferPTOLayoutPass();
 std::unique_ptr<Pass> createPTOA5NormalizeTMovPass();