systemc-components: add the SMMU V3 model by mahmdkamel · Pull Request #56 · qualcomm/qbox

mahmdkamel · 2026-05-07T07:24:41Z

Add smmuv3 model under systemc-components.
Add a test bench at tests/components/smmuv3.

p-b-o · 2026-05-07T18:52:05Z

 add_subdirectory(generic_lua_model)
 add_subdirectory(container_builder)
 add_subdirectory(smmu500)
+add_subdirectory(smmuv3)


A general remark about naming. Arm-MMU 600 or 700 are the two Arm SMMUv3, targeting v3.1 and v3.2 respectively. It seems the current implement is more v3.1, since it does not have support for Secure stage 2 translations.
So probably naming it smmu600 makes sense.

@markfoodyburton ?!

p-b-o · 2026-05-07T18:53:14Z

+    read_dram(dest_pa, &readback, 4);
+    ASSERT_EQ(readback, 0xCAFEBABEu);
+}
+


Maybe not required now, but would be useful to add S2 translations unit tests also, and S1 + S2 too, to mimic what a VM would do. In general, would be nice to have full coverage on SMMU code if we want to make this a "production ready" model.

Also, it would be nice to have expected_fail tests, with bad permissions or wrong translation table setup. It naturally comes with coverage approach mentioned in previous paragraph.

It can definitely grow over time, and it's not a blocker for this PR.

p-b-o · 2026-05-07T18:54:18Z

+
+    ASSERT_EQ(mmio_read32(REG_CMDQ_CONS) & 0x1F, 1u);
+}
+


Same remark about testing other commands.

p-b-o · 2026-05-07T18:56:17Z

+
+} // namespace gs
+
+#endif // SMMUV3_H


Overall looks quite complete! It's pretty inspired from QEMU model (maybe that's what was suggested in the prompt?).

I would trust more coverage and unit tests than a manual review for most of the complex parts (stages, ptw, registers configuration, etc)

Thank you very much Pierrick, more test cases were added, and I added support for TBU DMI and DMI INV and test benches for them, please check again.

androm3da

Mostly nits here and there, I don't have any significant objections. LGTM

androm3da · 2026-05-07T16:52:18Z

+
+        if (level == 3) break; // Must be page descriptor
+
+        switch (type) {


Please add a default handler (maybe unreachable?)

androm3da · 2026-05-07T17:45:24Z

+        case NORMAL_WB:
+            oss << "Normal-WB";
+            break;
+        }


Add a default: unreachable

androm3da · 2026-05-08T01:56:06Z

+class smmuv3_memory_attrs_extension : public tlm::tlm_extension<smmuv3_memory_attrs_extension>
+{
+public:
+    enum MemoryType {


enum class would restrict the type and scope more strongly, consider whether it could be used here.

should be adjusted now!

p-b-o

It looks pretty good, and I think it's more than enough for a first version. If you don't have time, feel free to skip the coverage part.

p-b-o · 2026-05-08T02:37:00Z

+    ASSERT_EQ(par_lo & ~0xFFFu, static_cast<uint32_t>(page_pa) & ~0xFFFu);
+}
+
+TEST_BENCH(smmuv3_bench, TwoLevelStreamTable_S1_4KPage)


While this test is useful, maybe the intent was to add a two stages translation test, exercising S1 + S2. I didn't find this configuration in all the new tests added.

It should be added now, with other tests to increase coverage, and still adding more, also there is no any meaningful logging used, I am on the process of adding SCP_* log messages in the important locations.

p-b-o · 2026-05-08T02:38:04Z

+    ASSERT_EQ(dmi_inv_observer.ranges.size(), 0u);
+}
+
+int sc_main(int argc, char** argv)


That's definitely a lot of new tests! Hard to say what might be missing from the full patchset, but running the test with a gcov build and see coverage might hint on which situations are not covered yet.

still working on increasing it more, now it shows 89.31 % line coverage and 92.11 % for functions but still the branch is low: 73.76 %

Great. Leaving a few branch combinations behind is not too much a problem (out of s1 + s2 which is important).

p-b-o · 2026-05-08T02:40:53Z

I'm not sure what is going on with the CI, but it seems like smmuv3 tests are segfaulting with gcc (undefined behavior resulting in a wrong optimization?). Definitely worth taking a look before merging it.

- Add smmuv3 model under systemc-components. - Add a test bench at tests/components/smmuv3. Signed-off-by: Mahmoud Kamel <mkamel@qti.qualcomm.com>

mahmdkamel requested review from androm3da and markfoodyburton May 7, 2026 07:24

mahmdkamel force-pushed the add_smmuv3 branch 4 times, most recently from ce7966d to 6622c44 Compare May 7, 2026 08:50

markfoodyburton approved these changes May 7, 2026

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Comment thread systemc-components/smmuv3/src/.gitignore Outdated

androm3da requested a review from p-b-o May 7, 2026 16:26

p-b-o reviewed May 7, 2026

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mahmdkamel force-pushed the add_smmuv3 branch 2 times, most recently from 9b6857a to 7ae2574 Compare May 8, 2026 01:40

androm3da reviewed May 8, 2026

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p-b-o reviewed May 8, 2026

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mahmdkamel force-pushed the add_smmuv3 branch 2 times, most recently from c9c391c to d89f84e Compare May 8, 2026 16:12

systemc-components: add the SMMU V3 model

8e6b3b0

- Add smmuv3 model under systemc-components. - Add a test bench at tests/components/smmuv3. Signed-off-by: Mahmoud Kamel <mkamel@qti.qualcomm.com>

mahmdkamel force-pushed the add_smmuv3 branch from d89f84e to 8e6b3b0 Compare May 8, 2026 16:13


		if (level == 3) break; // Must be page descriptor

		switch (type) {

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