Refactor CMIS memory map into pages by aditya-nexthop · Pull Request #667 · sonic-net/sonic-platform-common

aditya-nexthop · 2026-05-18T17:08:05Z

Cherry pick commits from nexthop-ai#1 to public fork since it wasn't possible to move the original PR to sonic-net

This PR implements part 1 of 2 of the HLD described here.
It introduces the CmisPage class and refactors CMIS Mem Map into pages

Description

Refactor the CMIS memory map from a single monolithic class into per-page
classes that each own their own field definitions.

Introduces a new sonic_platform_base/sonic_xcvr/mem_maps/public/cmis_pages/
package with one module per CMIS page:
- pg_00_administrative_lower.py / pg_00_administrative_upper.py
- pg_01_advertising.py
- pg_02_thresholds.py
- pg_10_lane_datapath_config.py
- pg_11_lane_datapath_status.py
- pg_12_tunable_laser_ctrl_status.py
- pg_13_module_perf_diag_ctrl.py
- pg_2f_vdm_advertising_ctrl.py
- pg_9f_cdb_message.py
Adds a CmisPage base class (cmis_pages/base.py) that:
- Stores its own page and bank numbers.
- Implements getaddr(offset, page_size) so each page computes linear
  EEPROM offsets locally instead of relying on CmisFlatMemMap.getaddr.
- Provides register_fields(memmap), which composes the page's fields
  onto the parent memory map and merges shared RegGroupFields (e.g.
  ADMIN_INFO_FIELD, ADVERTISING_FIELD) that span multiple pages,
  re-sorting members by offset to preserve the RegGroupField invariant.
Adds cmis_pages/cmis_page_consts.py with CMIS layout constants
(CMIS_EEPROM_PAGE_SIZE, CMIS_ARCH_PAGES,
CMIS_NUM_NON_BANKED_PAGES, and page-number constants).
Reworks cmis.py:
- CmisFlatMemMap now exposes an add_pages(*pages) helper that appends
  to self.pages and calls register_fields on each page.
- CmisFlatMemMap composes only the lower and upper halves of page 0x00.
- CmisMemMap extends it by adding pages 0x01, 0x02, 0x10–0x13, 0x2F,
  and 0x9F.
- getaddr now takes page as an explicit parameter and clamps bank
  to 0 for non-banked pages (00h–0Fh) and CDB pages (9Fh–AFh).
Registers the new cmis_pages package in setup.py.

Net diff: cmis.py shrinks from ~720 lines to ~120 lines, with the field
definitions redistributed across the per-page modules.

Motivation and Context

The previous CmisFlatMemMap / CmisMemMap implementation defined every
field for every CMIS page inside a single ~700-line class. This made it
hard to:

Locate the fields belonging to a given page.
Compose alternative memory maps (e.g. flat vs. paged, per-bank variants)
without duplicating large blocks of field definitions.
Re-map an entire page (for vendor-specific layouts or future CMIS
revisions) without editing the monolithic class.

Splitting the map into per-page classes makes each page self-contained
and addressable, lets CmisFlatMemMap and CmisMemMap declare their
contents by listing the pages they include, and allows shared field
groups that cross page boundaries (like ADMIN_INFO_FIELD spanning lower
and upper page 00h, or ADVERTISING_FIELD spanning pages 01h and 11h)
to be merged automatically by register_fields.

Exposing the page number as a constructor parameter on each page class
also enables entire pages to be remapped easily without duplicating field
declarations.

How Has This Been Tested?

This change introduces no new fields or changes in behavior.
All the existing unit tests pass.

Additional Information (Optional)

This change is intended to be behavior-preserving: the resulting
CmisMemMap exposes the same set of named fields at the same EEPROM
offsets as before the refactor. Only the internal organization of the
memory map definition changes.

Signed-off-by: Abhi Singh <abhi@nexthop.ai>

…on easier Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

mssonicbld · 2026-05-18T17:08:13Z

/azp run

azure-pipelines · 2026-05-18T17:08:24Z

Azure Pipelines successfully started running 1 pipeline(s).

mssonicbld · 2026-05-18T17:36:48Z

/azp run

azure-pipelines · 2026-05-18T17:36:58Z

Azure Pipelines successfully started running 1 pipeline(s).

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

mssonicbld · 2026-05-18T17:56:27Z

/azp run

azure-pipelines · 2026-05-18T17:56:36Z

Azure Pipelines successfully started running 1 pipeline(s).

page model to handle bank calculation correctly. Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

mssonicbld · 2026-05-18T18:44:18Z

/azp run

azure-pipelines · 2026-05-18T18:44:27Z

Azure Pipelines successfully started running 1 pipeline(s).

prgeor · 2026-05-18T19:13:01Z

@aditya-nexthop may I suggest to have following dir style?

../public/cmis/pages/

page00.py
page01.py
page02.py
...
...
...
page2f.py
page9f.py

../public/cmis/cmis.py

The page file anywas has comment to indicate what this memmap corresponds to.

I realized that this changes the location of cmis.py that holds theCmisFlatMemMap and CmisMemMap from sonic_platform_base/sonic_xcvr/mem_maps/public/cmis.py to sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/cmis.py.

We now have a divergence where, cmis.py is inside the cmis directory while cdb.py and c_cmis.py is still in sonic_platform_base/sonic_xcvr/mem_maps/public/. I recommend all of them are at the same depth.

Where should we put them? Inside cmis or outside?

prgeor

@aditya-nexthop have we considered if any impact to link up time (fully loaded system), dom polling interval, link initialization when single optics insertion. A comparison will be good.

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

…e class Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

mssonicbld · 2026-05-19T01:18:49Z

/azp run

azure-pipelines · 2026-05-19T01:18:58Z

Azure Pipelines successfully started running 1 pipeline(s).

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

mssonicbld · 2026-05-19T17:58:47Z

/azp run

azure-pipelines · 2026-05-19T17:58:56Z

Azure Pipelines successfully started running 1 pipeline(s).

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

mssonicbld · 2026-05-20T23:29:31Z

/azp run

azure-pipelines · 2026-05-20T23:29:40Z

Azure Pipelines successfully started running 1 pipeline(s).

bgallagher-nexthop · 2026-05-21T02:11:54Z

@aditya-nexthop have we considered if any impact to link up time (fully loaded system), dom polling interval, link initialization when single optics insertion. A comparison will be good.

We shouldn't expect to see any performance impact here for xcvrd from this refactor since the field lookup logic remains the same, so performance should not change after memory map construction. I thought it might be possible that xcvrd startup time could change (affecting link up time) due to the interpreter needing to do more module importing so I did some basic testing with SONiC images before and after this change on a fully loaded system and detected no regression:

link up time was roughly the same
the DOM polling loop was still reliably completing within its configured 30s time

Copilot

Pull request overview

Refactors the CMIS transceiver EEPROM memory map implementation in sonic_platform_base from a single monolithic mem-map class into a composable, per-page design, aligning with the HLD direction for CMIS map organization.

Changes:

Introduces a CmisPage base class with shared CMIS addressing (linear_offset) and a register_fields() composition/merge mechanism.
Splits CMIS (and C-CMIS / CDB-adjacent) field definitions into page modules under mem_maps/public/cmis/pages/, and rebuilds CmisMemMap by composing pages.
Updates unit tests and downstream mem-maps (CDB, C-CMIS, Credo/Amphenol vendor maps) to use the new paging structure, and registers new packages in setup.py.

Reviewed changes

Copilot reviewed 28 out of 28 changed files in this pull request and generated 5 comments.

Show a summary per file

File	Description
tests/sonic_xcvr/test_cmis.py	Updates addressing tests to validate `CmisPage.linear_offset()` invariants.
tests/sonic_xcvr/test_cdb.py	Updates CDB tests to use `get_field()` lookups and the shared linear addressing helper.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page.py	Adds `CmisPage` base class with shared addressing and field registration/merge logic.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/consts.py	Adds CMIS page/bank layout constants and page number constants.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/init.py	Exposes CMIS page classes and constants as a package API.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page00_lower.py	Defines CMIS page 00h lower-half fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page00_upper.py	Defines CMIS page 00h upper-half fields (merged into shared groups).
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page00_cdb.py	Defines CDB-relevant fields on CMIS page 00h.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page01.py	Defines CMIS page 01h (Advertising) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page02.py	Defines CMIS page 02h (Thresholds) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page04.py	Defines C-CMIS page 04h fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page10.py	Defines CMIS page 10h (Lane datapath config) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page11.py	Defines CMIS page 11h (Lane datapath status) fields (and cross-page group contributions).
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page12.py	Defines CMIS page 12h (Tunable laser) fields (and cross-page group contributions).
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page13.py	Defines CMIS page 13h (Perf/diag ctrl) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page2f.py	Defines CMIS page 2Fh (VDM advertising/control) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page34.py	Defines C-CMIS page 34h (Media lane FEC PM) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page35.py	Defines C-CMIS page 35h (Media lane link PM) fields.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page9f.py	Defines CMIS page 9Fh CDB message fields that contribute to shared CDB groups.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page9f_cdb.py	Defines additional CDB-side fields on CMIS page 9Fh (LPL message area).
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/cmis.py	Replaces monolithic mem-map definition with page composition via `add_pages()`.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/init.py	Re-exports CMIS mem-map API from the new `cmis/` package structure.
sonic_platform_base/sonic_xcvr/mem_maps/public/cmis.py	Deletes the previous monolithic CMIS mem-map module.
sonic_platform_base/sonic_xcvr/mem_maps/public/cdb.py	Refactors CDB mem-map to register fields via CMIS page classes.
sonic_platform_base/sonic_xcvr/mem_maps/public/c_cmis.py	Refactors C-CMIS mem-map to add C-CMIS-specific pages via `add_pages()`.
sonic_platform_base/sonic_xcvr/mem_maps/credo/aec_800g.py	Refactors Credo vendor extensions into page classes and composes them via `add_pages()`.
sonic_platform_base/sonic_xcvr/mem_maps/amphenol/backplane.py	Refactors Amphenol extensions into a page class composed into `CmisFlatMemMap`.
setup.py	Registers the new CMIS package paths for distribution.

+from typing import Dict
+from ....xcvr_mem_map import XcvrMemMap
+from .....fields.xcvr_field import RegField, RegGroupField
+from .consts import CMIS_ARCH_PAGES, CMIS_NUM_NON_BANKED_PAGES
+
+
+class CmisPage(XcvrMemMap):
+    fields: Dict[str, list[RegField]]  # This is a Dictionary of list of fields


+        self.pages.extend(pages)
+        for page in pages:
+            page.register_fields(self)
+


+        """Append pages to self.pages and register their fields onto self."""
+        self.pages.extend(pages)
+        for page in pages:
+            page.register_fields(self)


@@ -0,0 +1,22 @@
+"""
+    cmis_page_consts.py


@@ -0,0 +1,21 @@
+"""
+    pg_9f_cdb_message.py


prgeor · 2026-05-21T19:52:29Z

@aditya-nexthop can you address copilot comments. Also the PR description is outdated. Thanks for keeping the file nam simple :)

abhi-nexthop and others added 5 commits May 18, 2026 17:05

CMIS refactor to pages

faa4cbc

Signed-off-by: Abhi Singh <abhi@nexthop.ai>

Add page-driven field registration logic to make memory map compositi…

678f03f

…on easier Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

Refactor CmisFlatMemMap to use page-driven field registration

dfa7410

Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

Review feedback

ed7fcc2

Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

Expose page number parameter to allow entire pages to be remapped easily

6bb1d8a

Signed-off-by: Brian Gallagher <bgallagher@nexthop.ai>

aditya-nexthop mentioned this pull request May 18, 2026

HLD: ELSFP Memory map and paging support sonic-net/SONiC#2207

Open

Remove unused CMIS_NUM_BANKED_PAGES and fix up import issues

1c4c917

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

aditya-nexthop force-pushed the aditya.cmis-mem-map-refactor branch from a9cfe9a to 1c4c917 Compare May 18, 2026 17:56

Unify getaddr calculation for legacy pages as well as the refactored

691dbbc

page model to handle bank calculation correctly. Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

aditya-nexthop marked this pull request as ready for review May 18, 2026 18:57

aditya-nexthop mentioned this pull request May 18, 2026

Refactor CMIS memory map into pages nexthop-ai/sonic-platform-common#1

Closed

prgeor reviewed May 18, 2026

View reviewed changes

Comment thread sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page.py

prgeor reviewed May 18, 2026

View reviewed changes

Comment thread sonic_platform_base/sonic_xcvr/mem_maps/public/cmis/pages/page9f.py

aditya-nexthop added 3 commits May 18, 2026 22:53

Reorganize the page files as per review comment

292ba7a

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

Make linear_offset and get_field_from_pages static methods of CmisPag…

d73f96c

…e class Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

Also refactor CDB, C-CMIS and vendor specific Amphenol and Credo maps

ef0e522

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

Remove unused method get_field_from_pages

4af016d

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

Merge master into aditya.cmis-mem-map-refactor

5a7d596

Signed-off-by: aditya-nexthop <aditya@nexthop.ai>

prgeor requested a review from Copilot May 21, 2026 19:45

Copilot started reviewing on behalf of prgeor May 21, 2026 19:45 View session

Copilot AI reviewed May 21, 2026

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prgeor requested a review from micas-net May 21, 2026 19:52

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Description

Motivation and Context

How Has This Been Tested?

Additional Information (Optional)

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aditya-nexthop commented May 18, 2026 •

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