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@qimcis qimcis commented Jan 18, 2026

Description

Add CS350 Fall 2015 Midterm exam data and solution file to the repository under the courseexam benchmark.

Changes

  • Add exam files to /home/qi/system-intelligence-benchmark/benchmarks/courseexam_bench/data/raw/cs350_fall_2015_midterm.
  • Add solutions file F15-midterm-soln.pdf for the CS350 Fall 2015 Midterm.
  • Add exam metadata (title: CS350 Fall 2015 Midterm, exam ID: cs350_fall_2015_midterm) and note that there are no reference files.

Testing

Ran python3 courseexam/prepare.py to validate intake and preparation of the added exam data.

Checklist

  • Tests pass locally
  • Code follows project style guidelines
  • Documentation updated (if needed)

V(sc);
}

Re-implement func1 and func2 (including any necessary global variable declarations and initialization) using locks and condition variables (no semaphores). Your re-implemented functions must have the same behavior as the original semaphore-based functions.
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This question was modified from the original exam. It is missing some information and guidelines regarding the solution

Comment on lines +21 to +41
Global variables / Initialization
struct semaphore *sa;
struct semaphore *sb;
struct semaphore *sc;
sa = semcreate("A",1);
sb = semcreate("B",1);
sc = semcreate("C",0);

void func1(){
P(sa);
funcA();
V(sa);
P(sc);
}

void func2(){
P(sb);
funcB();
V(sb);
V(sc);
}
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We should probably include this as a code block

"points": 12,
"type": "Freeform",
"tags": ["concurrency", "synchronization", "locks", "condition-variables"],
"answer": "A correct re-implementation uses separate locks for protecting funcA and funcB critical sections and a lock+condition variable to implement the signaling behavior of sc, preserving ordering so that func1 waits until func2 signals. For example: declare locks la and lb for funcA and funcB respectively; declare a lock lc, a condition variable cv, and an integer count initialized to 0. func1 acquires la, calls funcA, releases la, then acquires lc, while(count<=0) cv_wait(cv, lc); count--; release lc. func2 acquires lb, calls funcB, releases lb, acquires lc, count++; cv_signal(cv, lc); release lc. (Any equivalent correct implementation that preserves semantics earns full credit.)",
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There is a reference implementation in the answer sheet that we can use

Comment on lines +58 to +71
## Question 2a [2 point(s)]

What is the maximum number of entries in a page table in this system?

```json
{
"problem_id": "2a",
"points": 2,
"type": "Freeform",
"tags": ["paging", "virtual-memory"],
"answer": "16",
"llm_judge_instructions": "Award 2 points for the answer '16'. 0 points for any other answer."
}
```
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The question is missing essential information
image

Comment on lines +153 to +163
Consider the function:

void bump(){
int y;
x++; // x is a global variable
y = x;
kprintf("%d", y); // print value of y
}

Assume x is a volatile global integer initialized to 0 before any calls to bump. Suppose the program uses k concurrent threads, each calling bump once. Calls to kprintf are atomic (i.e., prints do not interleave). For k = 4 running on a single-core processor, which of the following outputs are possible? For each output, write "yes" if possible and "no" if not.

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There is some missing information from the question text

"type": "Freeform",
"tags": ["concurrency", "multithreading"],
"answer": "Possible: 1234 (yes), 4321 (yes), 2222 (yes), 4444 (yes). Not possible: 0123 (no), 1235 (no), 012 (no), 1124 (no).",
"llm_judge_instructions": "Part a (6 pts): Award 1 point each for the following six correct determinations: 1234 -> yes (1 pt), 4321 -> yes (1 pt), 2222 -> yes (1 pt), 4444 -> yes (1 pt), 0123 -> no (1 pt), 1235 -> no (1 pt). (The other outputs were included for completeness but will not be graded for points in this part.)"
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The question includes some information on how to score ("Note that you must get at least half of these correct to receive any credit for your answer.")

Comment on lines +186 to +188
## Question 3b [2 point(s)]

Suppose instead the concurrent program (with k = 4) runs on a machine with two single-core processors. Do your answers from part (a) change? If not, write "No Change". If so, indicate one output string from part (a) for which you would give a different answer and explain briefly.
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This question seems to be a continuation of the previous one. Each question should be fully standalone. See the guidelines on handling multi-part question

Comment on lines +207 to +213
Virtual Address -> Physical Address
0x0000 -> 0x2224
0x0007 -> 0x3234
0x0008 -> 0x3224
0x0010 -> 0x1AF0
0x0018 -> 0x3234
0x0008 -> 0x0AF0
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The table content seems to be different than the exam PDF. Could you double check?
image

Comment on lines +217 to +231
a. Given the translations shown, is it possible that the MMU used dynamic relocation (i.e., a single relocation register) to translate P’s virtual addresses to physical addresses? If so, write "YES" and indicate the relocation register value. If not, write "NO" and briefly explain why not.

b. Is it possible that the MMU used paging with page size 64 KB (2^16 bytes)? If so, write "YES". If not, write "NO" and briefly explain why not.

c. Is it possible that the MMU used paging with page size 4 KB (2^12 bytes)? If so, write "YES". If not, write "NO" and briefly explain why not.

```json
{
"problem_id": "4",
"points": 8,
"type": "Freeform",
"tags": ["memory-management", "mmu", "virtual-memory"],
"answer": "a) NO — the translations imply different relocation offsets for different addresses, so a single relocation register cannot explain them. b) NO — with 64 KB pages the low 16-bit offsets must match between virtual and physical addresses on the same page, but observed offsets differ. c) YES — 4 KB pages are consistent with the observed mappings (same 12-bit offsets where required).",
"llm_judge_instructions": "Total 8 pts: Part a (3 pts) — award 3 pts for correctly answering NO with a brief correct justification that translations use different offsets. Part b (3 pts) — award 3 pts for correctly answering NO with a brief correct justification about 16-bit offsets. Part c (2 pts) — award 2 pts for correctly answering YES with brief justification. Partial credit allowed for partially correct explanations."
}
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I think some information is missing from the questions

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also the answers do not match the reference answers in the exam PDF

@sys-intelligence sys-intelligence deleted a comment from github-actions bot Jan 19, 2026
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Experimental courseexam benchmark run

Exams tested:

  • cs350_fall_2015_midterm

Evaluation file: Download the evaluation-results artifact from this workflow run and inspect it using inspect view <file>.eval or the Inspect VS Code extension. For more details on how to use the web-based log viewer, see Inspect Log Viewer documentation

This experimental run helps you verify that questions have enough context for the LLM to answer and that grading rubrics are appropriate.

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2 participants